feat(aot): lower finite native dispatch and optimized integer operations

[yabanana]

What

Qualify finite native dispatch from contiguous relative relocations in an explicitly immutable table. A supported RIP-relative LEA followed by an indexed memory CALL/JMP derives the target set; CALL targets need compatible qualified internal ABIs, while JMP targets must be instruction boundaries in the same function. Bounds/alignment are checked before loading a target and membership before dispatch. Existing declared callbacks also gain membership checks.

Optimized public C consumers additionally require immediate ROL/ROR, BSWAP and a bounded SSE2 integer subset. These implement instruction semantics; they do not add a runtime x86 translator or a general SIMD reconstruction optimizer. Mutable tables, arbitrary register jumps, relative 32-bit jump tables, unknown target ABIs and variable rotate counts still reject.

Incremental review: yabanana/AnyPS5@feature/aot-optimized-facts...feature/aot-finite-dispatch

Tested

Latest integration checkpoint (12 October): aligned with main 2f4cc8983, including the new component technical-debt layout. The final combined stack with the separate C++ follow-up #4718 passed 588 compiler/relinker/runtime checks and 26 native integrations on Apple Silicon. Rebuilt cube AOT/reference still match all eight RGB frames after 600 flips each; controller and typed module-bundle acceptance pass. These are local results; hosted CI is running on the updated head. Full Linux/Windows builds still require maintainer dispatch.

Integration checkpoint, 12 October: merged main fe66af13e through the dependency stack and requalified affected provider identities after reviewing their implementations. The final combined stack passed 526 compiler/relinker/runtime cases, 26 native integration cases, the rebuilt graphics pair (600 flips each, teardown, eight exact RGB frames), controller O2 and SHA/memcmp O0/O2 checks on Apple Silicon. Hosted checks refer to the new head and remain separate from these local results. Full Linux/Windows builds require maintainer dispatch.

Validation: Apple ARM64. Six finite-dispatch execution/rejection tests cover calls, local jumps, out-of-range indices, incompatible ABIs, instruction-overlap targets, alias writes and undeclared callbacks. Rotate/byte-swap probes cover widths, partial registers, counts and defined flags; SSE2 lane/shift probes compare against x86 execution under Rosetta. Instruction semantics follow the corresponding Intel SDM Volume 2 entries. The final dependent stack passes 494 compiler/relinker tests, 24 native tests, pad_input O2, external components O0/O2 and exact graphics regression; reproduction is in the consumer PR. Hosted CI is pending.

Checklist

• Based on current main e7c70a2; existing platform dependencies retained
• No duplicate CPU-dispatch proposal found among open PRs
• No code comments, reports, images or third-party fixtures added
• No relaxed memory, ABI or image-comparison guards
• Conventions, diff and test registration checks pass
• Depends on: feat(aot): retain incremental debug facts and scoped obligations #4422, feat(aot): run controller input and independent provider-transfer consumers #4397, feat(aot): qualify provider contracts and recover bounded debug facts #4396, feat(aot): derive guard sites from qualified image recipes #4156, feat(aot): run source-built graphics on native Apple ARM64 #3891, feat(aot): discuss native ARM64 compiler architecture and integration #1835
• Unblocks: none
• AI-assisted: yes

[yabanana]

Superseded by #5021, which now contains the consolidated native ARM64 AOT implementation and verified consumers. #1835 remains the architecture discussion. Closing this stacked PR to keep one implementation review; its branch and review history are retained. This is not a merge into main.