Update Snapshots

Workflow runs for Update Snapshots

• fix: respect inherited silkscreen circle visibility

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  Update Snapshots#4202:Issue comment#4897 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• repro: encoder silkscreen circles ignore inherited visibility

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  Update Snapshots#4201:Issue comment#4896 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• fix: preserve authored footprint origins for CAD placement

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  Update Snapshots#4200:Issue comment#4806 (comment)createdbytscircuitbot
  Oct 24, 202610s
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• fix(pinheader): preserve female gender on explicit pinrow footprints

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  Update Snapshots#4199:Issue comment#4895 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• Repro: JLC 1.0mm stackup selection silently picks JLC04101H-7628 (#4890)

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  Update Snapshots#4198:Issue comment#4894 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• feat: allow selecting exact JLCPCB stackup construction via jlcpcbStackup

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  Update Snapshots#4197:Issue comment#4893 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• feat(board): support explicit jlcpcbStackup construction selection (#4890)

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  Update Snapshots#4196:Issue comment#4892 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• fabricatorPreset picks the first JLC stackup when several constructions match (4-layer 1.0 mm: 1080/2116/3313/7628)

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  Update Snapshots#4195:Issue comment#4890 (comment)createdbyBrayaniglesias08
  Oct 24, 20261s
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• Avoid guessing ambiguous JLCPCB stackups

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  Update Snapshots#4194:Issue comment#4891 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• Update Snapshots

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  Update Snapshots#4193:createdbytrixie010
  Oct 24, 20261s
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• Update Snapshots

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  Update Snapshots#4192:createdbyKrishnaX12
  Oct 24, 20261s
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• reject panel routing slots wider than board clearance

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  Update Snapshots#4191:Issue comment#4889 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• reproduce panel routing cuts across neighboring boards

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  Update Snapshots#4190:Issue comment#4888 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• expose fiducial copper through solder mask

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  Update Snapshots#4189:Issue comment#4886 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• chore: update packages @tscircuit/checks

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  Update Snapshots#4188:Issue comment#4871 (comment)createdbytscircuitbot
  Oct 24, 20261s
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• fix: synchronize footprint polarity with component pin labels

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  Update Snapshots#4187:Issue comment#4836 (comment)createdbytscircuitbot
  Oct 24, 20261s
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• chore: update packages @tscircuit/checks

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  Update Snapshots#4186:Issue comment#4873 (comment)createdbytscircuitbot
  Oct 24, 20261s
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• chore: update packages @tscircuit/checks

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  Update Snapshots#4185:Issue comment#4870 (comment)createdbytscircuitbot
  Oct 24, 2026Skipped
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• update @tscircuit/schematic-trace-solver to 0.0.238

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  Update Snapshots#4184:Issue comment#4869 (comment)createdbytscircuitbot
  Oct 24, 20261s
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• chore: update packages @tscircuit/checks

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  Update Snapshots#4183:Issue comment#4874 (comment)createdbytscircuitbot
  Oct 24, 20261s
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• Emit PCB SPICE channel modeling from transient simulations

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  Update Snapshots#4182:Issue comment#4856 (comment)createdbytscircuitbot
  Oct 24, 20261s
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• reproduce covered fiducial copper

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  Update Snapshots#4181:Issue comment#4885 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• fix(autorouting): transport unbroken copper-pour SRJ on remote autorouting paths

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  Update Snapshots#4180:Issue comment#4884 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• fix(netlabel): preserve schematicsymbol projection identity for shared supply pins

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  Update Snapshots#4179:Issue comment#4883 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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• fix(passive): accept documented schSize='small' alias as compact 'sm' symbol

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  Update Snapshots#4178:Issue comment#4882 (comment)createdbyvercel[bot]Bot
  Oct 24, 20261s
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