Add ESP32-H2 support

[floitsch]

Add ESP32-H2 as a firmware target (make esp32h2) and test it with an ESP32 companion using the existing breadboard connections.

• Add toolchain configuration, envelope/CI builds, chip identification, GPIO/ADC support, image recognition and RTC handling. H2 exposes 3840 bytes of RTC user memory. Enable BLE without Wi-Fi, Ethernet or ESP-NOW.
• Read the six-byte base MAC through esp_read_mac, avoiding the eight-byte eFuse MAC overflowing a six-byte buffer on IEEE 802.15.4 targets.
• Support serial test setup without Wi-Fi credentials and a paired Toit wiring precheck. The tester initiates cases, checks measurements/data, enforces deadlines, and accepts completion. Both boards delay the ordinary completion marker; the host runner needs no special mode.
• Put selected reusable tests in tests/hw/paired, with explicit roles, local pins and SPI target DMA capabilities. H2 entrypoints provide fixture configuration. Keep independent copies of the BLE/I2S utilities in the paired suite; leave the original ESP32 tests untouched for a follow-up PR.
• Add PWM waveform/endpoints/lifecycle, UART continuity with deliberate-pause controls, duplex/framing and actual UART pixel waveforms, GPIO open-drain release/ownership/edge waits, pulse filtering, SPI boundaries/cancellation/reuse, I2C read-buffer guards, long RMT output, BLE descriptors/payloads, and portable formatting/multipage storage tests.
• Fix two PWM defects exposed by the tests: frequency changes compared hertz against the duty-counter maximum, and 100% duty left a recurring low notch. Validate against the configured frequency limit and use idle-high for full duty, preserving readback and resumption of PWM.
• Requires the merged repeated-start fix in fix(i2c): drain TX FIFO before a repeated START toitware/esp-idf#134. The ESP-IDF pin update is separate in Update ESP-IDF for I2C controller and target fixes #3245; merge that first. This PR does not change the submodule pin.

Validation on ESP32-H2-DevKitM-1 and ESP32-DevKitC-V4:

• ESP32-H2 and ESP32 firmware/envelope builds pass; Toit analysis passes with warnings treated as errors, including the original ESP32 BLE/I2S tests. Earlier C6 build and firmware image/map checks passed.
• All 21 default focused regression cases pass. The same PWM tests also pass with ESP32 as testee and H2 as observer.
• All 79 bus cases pass, plus the 38-case repeated-start boundary regression. Wiring, identity, basic GPIO/ADC, external deep-sleep wakeup, runtime/storage/formatting and both BLE roles pass.
• UART tests verify 32769 bytes in each direction through 921600 baud, 32 KiB TX continuity through 2.5 Mbaud, and LED-style consecutive writes. Deliberate pauses are detected. Seven-pixel UART color/pulse captures pass.
• Four Philips16 I2S direction/clock-role combinations pass with over 200 KB verified per case. RX/master recorded 22 mismatches under the existing allowance of 30; the other three recorded zero. MSB32 RX/slave recorded zero; MSB32 TX/master recorded 30 and is marginal. Writers stop before completion.
• Corrupt data, silence, cleanup without completion, skipped work and testee crash all fail without either completion marker.

Known limitations exposed by the added tests:

• The RMT backend of pixel-strip 1.4.0 requests 20 MHz, which H2's divider realizes as 16 MHz. Its waveform test fails; the default regression selection uses the passing UART backend. The RMT reproducer remains available.
• MSB32 I2S receive/master exceeds the existing mismatch allowance. PCM16 transmit in either clock role fails to synchronize on this mixed-chip fixture. These cases remain explicit failing reproducers; no allowance was increased.
• Unpaced 2.5 Mbaud duplex dropped bytes. Passing TX continuity tests does not establish lossless duplex at that rate. Gap measurements have documented detection thresholds.

Setup, selected cases and failure reproducers are documented in tests/hw/esp32h2/README.md and tests/hw/paired/README.md. Changes to the existing ESP32/S3 suites are deferred to a follow-up PR.