[hardware] 🐛 Fix false illegal on unaligned widening reduction

[emiliengnr]

Hello, here is a pull request for a bug I found.

Problem

A widening reduction vwredsum.vs/vwredsumu.vs whose destination is not aligned
to the widened LMUL is legal RVV, but ara's dispatcher rejects it as illegal.
The register-alignment check keys on ara_req.emul (the widened LMUL) and applies
it to vs1, vd, and vs2. But a widening reduction's vd and vs1 are single 2*SEW
elements (EMUL=1, no group-alignment constraint), and vs2 is the source vector at
the original vlmul. So a legal unaligned-vd reduction trips illegal_insn, the
op is never issued, no completion returns, and the hart spins on the accelerator
handshake until reset.

Fix

For VWREDSUM/VWREDSUMU, check only vs2 against the original vlmul; drop the
alignment check on the single-element vd and vs1. Other ops are unchanged.

Changelog

Fixed

• Fix false illegal-instruction on a widening reduction (vwredsum/vwredsumu) with an unaligned vd

Checklist

• Automated tests pass
• Changelog updated
• Code style guideline is observed