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test(agc): measure pipeline cache hits against the bytes a pipeline adds - #7676
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vkGetPipelineCacheData is not stable in size on a driver that keeps pipelines: RADV grows a loaded cache by 8 bytes on the first create and shrinks it by 8 on a later hit, so an exact size match reports a hit as a miss and agc_pipeline_cache_file fails on hardware. lavapipe keeps nothing, so every size stays equal, the probe reads that as a device that does not store pipelines and the test skips, which is why CI never saw this. Size each pipeline in an empty cache first and treat a change below half that as a hit, and skip on a device where a pipeline adds nothing. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
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The current conventions check fails because the PR template sections |
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Some comparisons could not be completed because a pull request conflicts with the base branch. Review these shared files manually before concluding that there is no overlap.
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Windows and AMD's proprietary driver, since the description covers Linux and RADV. Radeon 860M (RDNA 3.5, driver 32.0.13058.8001), Windows 11 26300, WinLibs GCC 15.2.0 r7, Release,
AI-assisted |
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Thanks @LeandroLP23. One more data point would settle the scope of this: does Your run has this PR merged in, so it shows the change is good there, but not whether AMD's If it already fails on AI-assisted (Claude Code). |
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An NVIDIA data point for the scope question: on an RTX 3070 agc_pipeline_cache_file passes on main too, so the exact-size comparison does not misread a hit on this driver. With this PR it still runs (no skip) and passes.
Machine: Ubuntu 26.04, i7-8700, GCC 15.2, Release, BUILD_TESTING=ON. NVIDIA GeForce RTX 3070 (driver 595.99.02) and lavapipe (Mesa 26.0.3, LLVM 21.1.8) on the same host. PR merged onto main 84c1a4d9a (clean). ANYPS5_NO_SHADER_CACHE=1, -j1 --timeout 30.
agc_pipeline_cache_file |
RTX 3070 | lavapipe |
|---|---|---|
main 84c1a4d9a |
Passed (2 runs, one with -V) |
Skipped: the device does not keep pipelines in a pipeline cache |
head eccc81b50 |
Passed, 4 runs | Skipped, same message |
The -V output is the same on main and with the PR: the cache file is saved and reloaded at 6.3, 6.5 or 12.8 KiB, so a second pipeline adds roughly 6 KiB. Since the exact-size comparison on main passes, a hit doesn't move the vkGetPipelineCacheData size on this driver, and the RADV +8/-8 byte drift doesn't show up here. With a miss around 6 KiB, the half-pipeline threshold gives the same verdicts on NVIDIA.
Not run: Windows, AMD, Intel.
GPUs tested: NVIDIA GeForce RTX 3070 (595.99.02) and lavapipe (Mesa 26.0.3), Ubuntu 26.04
Written with AI assistance (Claude Code). I ran the builds and tests above on my machine.
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Another driver that really stores pipelines: NVIDIA GeForce RTX 4090, driver 617.42, Windows 11 Pro 26200, WinLibs GCC 15.2.0 r7, Release,
So the exact size comparison holds on NVIDIA, and the +/-8-byte movement looks specific to RADV. The new check passes here too. All 250 tests AI-assisted: yes (Claude Code) |
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@DavidAmsellem for the scope question, on AMD's proprietary driver without this PR: RX 6700 XT (gfx1031, RDNA 2), driver 32.0.21045.5002, Windows 11 26200, plain
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7 participants
What
agc_pipeline_cache_filedecides whether a pipeline is already in a cache by creating it andchecking that
vkGetPipelineCacheDatareturns the same size as before. That size is not stable on adriver that really stores pipelines.
Measured on an AMD Radeon RX 7900 XT (RADV NAVI31, Mesa 25.2.8), with
VkPipelineCreationFeedbackas the reference for whether a create hit the cache:A hit moves the serialized size by +8 or -8 bytes, so the exact comparison reports a hit as a miss
and the test fails on hardware with
the cache file lost the pipeline of the object that saved first. The driver keeps both pipelines:vkMergePipelineCachesand the round trip throughvkGetPipelineCacheDatawere checked separately and report a hit for both pipelines in everycombination.
lavapipe never stores anything in a pipeline cache (every size stays at 32 bytes), so the probe at
the start reads that as a device that does not keep pipelines and the whole test skips. That is why
CI has not seen this: on the only driver it runs, the test never executes.
This sizes each pipeline in an empty cache first and counts a change below half that as a hit, which
separates the 8 byte noise from the ~1348 bytes a real miss adds, with no fixed constant. The skip
now asks the same question directly: a device where a pipeline adds nothing to an empty cache does
not keep pipelines. lavapipe still skips, unchanged.
Open PRs #6958 and #6771 add further
holdscalls to this test; they do not touch these lines andthis change makes those assertions work on hardware too.
Tested
Linux (Ubuntu 24.04, GCC 13.3), full build, no CI run.
agc_pipeline_cache_fileon RADV NAVI31: fails 3 of 3 onmain, passes with this change.agc_pipeline_cache_fileon lavapipe: skips before and after.ctestwithANYPS5_REQUIRE_VULKAN=1: 1479 of 1480. The one failure isagc_driver_guest_memory_lifetime_direct, which needs read-write access to/dev/udmabufand isunrelated to this change.
python3 tools/check_conventions.py --base origin/mainpasses.Checklist
main; no other open PR implements the same functionsNotImplemented_nid_no_patch); silent stubs are listed under Silent stubs in their library's technical debt file.mdfiles or images added to the repository (attach them to this PR)