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fix(trace): choose shared endpoint layer for manual pcbPath routes - #4940

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huangji6693-max wants to merge 1 commit into
tscircuit:mainfrom
huangji6693-max:fix/pcb-path-shared-endpoint-layer-3906
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huangji6693-max wants to merge 1 commit into
tscircuit:mainfrom
huangji6693-max:fix/pcb-path-shared-endpoint-layer-3906

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@huangji6693-max

@huangji6693-max huangji6693-max commented Oct 27, 2026 •

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Summary

When a manual pcbPath (or pcbPaths) starts on a multi-layer port (such as a plated hole spanning ["top", "bottom"]) and connects without an intermediate via to a port constrained to a specific layer (such as a via's .bottom port), Trace_doInitialPcbManualTraceRender and getRouteForPcbPath previously initialized currentLayer from anchorPort.getAvailablePcbLayers()[0] ("top"), ignoring the endpoint layer constraint and producing asymmetric routing depending on endpoint order.

This change selects a starting layer from anchorPort.getAvailablePcbLayers() that is shared with any constraining ports or explicit initial via fromLayer before the first via transition (matching the shared-layer logic already used by pcbStraightLine).

Closes #3906
/claim #3906

Test Plan

  • Added tests/components/primitive-components/trace-pcb-path-shared-endpoint-layer.test.tsx verifying that a manual pcbPath between J1.pin1 (plated hole) and .V1 > .bottom emits "bottom" wire segments in both directions (reverse = false and reverse = true).
  • Verified existing trace-*pcb-path* test suites pass.

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pcbPath chooses top when a plated-hole start connects to an explicit bottom via port

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