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fix: size hand-placed vias from the board's via minimums - #4796
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pcbPath/pcbPaths vias, <pcbtrace> route vias, <via> without a size and trace-level routed vias used the 0.2/0.3mm defaults even when the board declared minViaHoleDiameter/minViaPadDiameter, while autorouted and stitching vias already used the board minimums. All of them now share Board._getResolvedMinViaDiameters(), the same values recorded on pcb_board. Explicit sizes and pcbStyle via sizes still take precedence, and boards without via minimums keep the existing defaults. Fixes tscircuit/tscircuit#5559 (item 1).
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Fixes item 1 of tscircuit/tscircuit#5559.
Problem
Autorouted vias and via-stitching vias already use the board's
min_via_hole_diameterandmin_via_pad_diameter. Hand-placed vias did not, and always used the 0.2/0.3mm defaults. On a board declaringminViaHoleDiameter={0.3} minViaPadDiameter={0.6}, every one of these came out 0.2/0.3mm, a 0.05mm ring that JLCDFM flags as Danger:pcbPath/pcbPathsvias<pcbtrace>route vias without a size<via>with noholeDiameter/outerDiameterA board that mixes autorouted and hand-routed nets therefore ended up with two via sizes.
Changes
Boardwrites ontopcb_boardintoBoard._getResolvedMinViaDiameters(). The order is unchanged:minViaHoleDiameter/minViaPadDiameter, then the board'spcbStylevia size, then JLCPCB's minimums, with the pad derived from the hole when only the hole minimum is given.getViaDiameterDefaultsForComponent(component, overrides)is now used by<via>,<pcbtrace>,pcbPath/pcbPaths(both manual-trace render paths) and trace-level routing. The precedence is:<via>props, or route-pointhole_diameter/outer_diameter)pcbStylevia size, so a group-level style still winsTests
One test per file, each with a PCB snapshot labelled by
pcbnotetext:repro5559-hand-placed-vias-board-minimums:pcbPath,<pcbtrace>and<via>on a 0.3/0.6 board. This fails onmainwith all four vias at 0.2/0.3 and passes with this change.via-board-minimum-diameters1: explicit,pcbStyleand route-point sizes still win over the board minimums.via-board-minimum-diameters2: with onlyminViaHoleDiameter, vias matchpcb_board.min_via_*(0.3/0.45).via-board-minimum-diameters3: a board without minimums keeps 0.2/0.3.I also ran every test file that touches
<via>,pcbPath,<pcbtrace>or via sizes (99 files). Their failures are identical tomainon the same machine: pre-existing macOS-vs-CI snapshot render differences, and none are new.tsc --noEmitis clean.The snapshots were generated on macOS. If CI renders them differently,
/update-snapshotsshould refresh them.Related
@tscircuit/checksPRs for the DFM checks in the same issue: tscircuit/checks#452 (via sizes / annular rings) and tscircuit/checks#453 (trace width).