Issues

• Look into simplifying data memory

  enhancement
  physical-computation/Sail-RV32I-common#27 · Filter by author rjlv2 opened on May 22, 2019
  

• JALR might not be compliant with specifications.

  physical-computation/Sail-RV32I-common#26 · Filter by author rjlv2 opened on May 21, 2019
  

• Possible hazard in combinational logic of control unit

  physical-computation/Sail-RV32I-common#25 · Filter by author rjlv2 opened on May 21, 2019
  1

  

• Forwarding Unit might not actually require ternary operators.

  physical-computation/Sail-RV32I-common#24 · Filter by author rjlv2 opened on May 20, 2019
  

• Modified data memory

  physical-computation/Sail-RV32I-common#21 · Filter by author btsouts opened on May 16, 2019

• Code cleanup to meet coding conventions

  physical-computation/Sail-RV32I-common#12 · Filter by author phillipstanleymarbell opened on Apr 24, 2019
  3

  

• CSR forwarding bug

  unconfirmed bug
  physical-computation/Sail-RV32I-common#8 · Filter by author rjlv2 opened on Mar 10, 2019
  1

• Merge RV32_I and narvie's cpu.v

  enhancement
  physical-computation/Sail-RV32I-common#2 · Filter by author harrysarson opened on Feb 26, 2019
  

• Instruction memory uses LC

  physical-computation/Sail-RV32I-common#13 · Filter by author harrysarson opened on Jan 29, 2019
  1

• Implement a modified Harvard architecture, with separate instruction and data caches but single memory.

  physical-computation/Sail-RV32I-common#15 · Filter by author rjlv2 opened on Nov 15, 2018
  1

• Implement CSR

  physical-computation/Sail-RV32I-common#18 · Filter by author rjlv2 opened on Oct 12, 2018
  2

• Differentiate CSRR instructions from ECALL/EBREAK

  physical-computation/Sail-RV32I-common#16 · Filter by author rjlv2 opened on Oct 9, 2018