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    8 repositories

    • logikbench

      Public
      Digital logic benchmark suite
      Verilog
      •
      MIT License
      •16•95•3•1•Updated Oct 27, 2026Oct 27, 2026

    • switchboard

      Public
      Communication framework for RTL simulation and emulation.
      Python
      •
      Apache License 2.0
      •30•325•38•3•Updated Oct 26, 2026Oct 26, 2026

    • umi

      Public
      Universal Memory Interface (UMI)
      SystemVerilog
      •
      Apache License 2.0
      •21•172•20•4•Updated Oct 26, 2026Oct 26, 2026

    • cocotbext-umi

      Public
      UMI interface modules for Cocotb
      Python
      •
      Apache License 2.0
      •0•2•0•1•Updated Oct 23, 2026Oct 23, 2026

    • wildebeest

      Public
      FPGA synthesis tool
      SystemVerilog
      •
      Apache License 2.0
      •8•146•3•1•Updated Oct 13, 2026Oct 13, 2026

    • sbtest

      Public
      Docker image with RTL simulation tools preinstalled
      Dockerfile
      •
      Apache License 2.0
      •3•2•0•0•Updated Sep 14, 2026Sep 14, 2026

    • zaui

      Public
      Generate a website from markdown with a minimum of fuss.
      Svelte
      •
      MIT License
      •1•13•0•1•Updated Nov 15, 2025Nov 15, 2025

    • ebrick-demo

      Public
      Demo: how to create a custom EBRICK
      SystemVerilog
      •
      Apache License 2.0
      •3•30•0•1•Updated Nov 20, 2024Nov 20, 2024
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