Don't cache ptxas PTX-verification passes - #2809
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For a virtual-only gencode such as -gencode arch=compute_120,code=compute_120 there is no SASS to emit, so nvcc runs ptxas purely to syntax-check the PTX and passes no -o at all: ptxas -arch=compute_120 -m64 kernel.compute_120.ptx group_nvcc_subcommands_by_compilation_stage marks every ptxas sub-command Cacheable::Yes, and the caching path requires an "obj" output that only -o populates, so the whole compile dies in cicc::generate_compile_commands with `Missing "cubin" file output`. Any target carrying a +PTX architecture can hit this; it surfaced building torchao's mxfp8 extension, which appends compute_120,code=compute_120 alongside a real compute_100,code=sm_100 gencode. Decide cacheability at the grouping stage instead. Cacheable::No routes the sub-command to the path nvcc.rs already uses for non-cacheable steps: build the command and run it directly. Returning CompilerArguments::CannotCache from cicc::parse_arguments does not work, because the sub-command dispatch turns CannotCache into an error rather than falling back to running the command, so it only moves the failure to "Cannot cache(no output file)". Cacheable::No with a group is already how the host preprocessor steps are handled. Test Plan: Carried as a source patch in PyTorch CI, where it fixes the inductor build that compiles torchao against CUDA 13.2: ``` python .ci/pytorch/smoke_test/smoke_test.py --package=torchonly ``` No unit test here: reproducing it needs a mocked nvcc --dryrun emitting the virtual-only sub-command shape, which is worth adding separately once the shape can be captured from real nvcc output rather than hand-written. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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cc @mbrobbel @sylvestre please review |
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Follow up from #2722, we discovered issue while building torchao._C_mxfp8 extension: https://github.com/pytorch/pytorch/actions/runs/30797328141/job/91700085985
"nvcc": nvcc_args
"-gencode=arch=compute_100,code=sm_100",
"-gencode=arch=compute_120,code=compute_120",
],
For a virtual-only gencode such as -gencode arch=compute_120,code=compute_120 there is no SASS to emit, so output is not cacheable. nvcc runs ptxas purely to syntax-check the PTX and passes no -o at all:
ptxas -arch=compute_120 -m64 kernel.compute_120.ptx
group_nvcc_subcommands_by_compilation_stage marks every ptxas sub-command Cacheable::Yes, and the caching path requires an "obj" output that only -o populates, so the whole compile dies in cicc::generate_compile_commands with
Missing "cubin" file output. Any target carrying a +PTX architecture can hit this.This fix adds a Cacheable::No clause to route the sub-command to the path nvcc.rs already uses for non-cacheable steps: build the command and run it directly.
Test Plan:
Carried as a source patch in PyTorch CI, where it fixes the inductor build that compiles torchao against CUDA 13.2: