Keep unknown chips off the ESP32 board tables and let the driver own the I2S clock where the raw divider is unverified

[ainyan03]

Summary

Two places selected code by chip name and let unknown chips fall through to the ESP32 branch:

• Pin tables: a chip that none of the seven tables name landed on the ESP32 rows. A new target with enough GPIOs (ESP32-S31 / H4, ESP-IDF 6.1 preview) compiled and then probed the ESP32 I2C pins as board_unknown; one with fewer (ESP32-H21) failed to compile. The tables now name the ESP32 branch and end in the sentinel row for anything else. The ESP32-C2, which has no board, moves from the ESP32 rows to the sentinel as well.
• I2S clock: the driver configuration asked for I2S_CLK_SRC_PLL_160M except on H2 / P4. It now asks for I2S_CLK_SRC_DEFAULT everywhere — on every chip whose raw divider path runs it is that same PLL_160M source, so nothing changes on the existing targets. The raw clock divider the speaker / mic tasks write afterwards depends on a per-chip source frequency (M5UNIFIED_I2S_PLL_D2_HZ) that cannot be derived from a capability macro, so it is defined only for the targets it was verified on; any other chip takes the driver-managed path the ESP32-P4 already uses (real rate passed at setup, no raw override, the over-sampled rate for PDM capture) instead of assuming 80 MHz. The unverified H4 entry is dropped from that table.

With the matching M5GFX change (m5stack/M5GFX#302), ESP32-S31 and ESP32-H21 build.

Verification

• Builds: Arduino core 3.1.1 / 2.0.17 / 3.3 (C5), ESP-IDF 5.1 / 5.2 / 5.3 / 5.5 (incl. C61) / 6.0 — the CI matrix, all clean; ESP-IDF 6.1 preview for ESP32-S31 and ESP32-H21.
• Hardware, unchanged behaviour: ESP32 (Core Basic / Tough / Core2 ×5), ESP32-S3 (CoreS3 / StopWatch), ESP32-C5 (Tough C5), ESP32-C61 (CoreMatrix), ESP32-P4 (Tab5) — board detection, I2C scan, speaker play / stop and mic recording.
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