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PCI: apple: bring up T600x/T602x PCIe-C tunnels without an m1n1 handoff #10

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iconidentify merged 8 commits into from
Oct 3, 2026
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PCI: apple: bring up T600x/T602x PCIe-C tunnels without an m1n1 handoff #10

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b1bce22
PCI: apple: Cold-init T600x/T602x PCIe-C ports without an m1n1 handoff
wesleygrimes Oct 2, 2026
5501591
thunderbolt: apple: Accept PCIe-C kernel cold init on T600x/T602x
wesleygrimes Oct 2, 2026
b3fa3e3
PCI: apple: Keep cold-initialized PCIe-C functions runtime-active
wesleygrimes Oct 2, 2026
024975f
PCI: apple: Keep cold-initialized PCIe-C links up through suspend-to-…
wesleygrimes Oct 2, 2026
c439df0
PCI: apple: Don't restart a quiesced PCIe-C host on resume
wesleygrimes Oct 3, 2026
4f48cb1
arm64: dts: apple: t602x: Add PCIe-C DART tunables
wesleygrimes Oct 2, 2026
9e3a5bf
arm64: dts: apple: t600x: Add PCIe-C DART tunables
wesleygrimes Oct 2, 2026
c4726ef
tools: aurora-tb: Add a Thunderbolt PCIe test report
wesleygrimes Oct 2, 2026
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11 changes: 11 additions & 0 deletions arch/arm64/boot/dts/apple/t600x-pciec-dart-tunables.dtsi
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Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* T600x Thunderbolt PCIe (PCIe-C) DART tunables, included in each
* apciec[0-2] DART node. iBoot adds "dart-tunables-instance-0" to the ADT
* at boot, but m1n1 does not copy it for these DARTs, and the DART cannot
* probe without it. Values read from a J314s ADT, identical for all three
* ports. Offsets are relative to the DART's reg.
*/
apple,tunable = <0x20c 0xff000007 0xec000007>,
<0x220 0x000f0f0f 0x000f0f0f>,
<0x224 0x00ffffff 0x00080808>;
3 changes: 3 additions & 0 deletions arch/arm64/boot/dts/apple/t600x-pciec.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1198 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
#include "t600x-pciec-dart-tunables.dtsi"
};

apciec0: pcie@730000000 {
Expand Down Expand Up @@ -84,6 +85,7 @@
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1215 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
#include "t600x-pciec-dart-tunables.dtsi"
};

apciec1: pcie@b30000000 {
Expand Down Expand Up @@ -152,6 +154,7 @@
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1232 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
#include "t600x-pciec-dart-tunables.dtsi"
};

apciec2: pcie@f30000000 {
Expand Down
3 changes: 3 additions & 0 deletions arch/arm64/boot/dts/apple/t602x-dieX.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -584,6 +584,7 @@
#iommu-cells = <1>;
apple,dma-range = <0x0 0x80000000 0x0 0x80000000>;
apple,dma-offset = <0x100 0x0>;
#include "t602x-pciec-dart-tunables.dtsi"
};

DIE_NODE(apciec0): pcie@730000000 {
Expand Down Expand Up @@ -812,6 +813,7 @@
#iommu-cells = <1>;
apple,dma-range = <0x0 0x80000000 0x0 0x80000000>;
apple,dma-offset = <0x100 0x0>;
#include "t602x-pciec-dart-tunables.dtsi"
};

DIE_NODE(apciec1): pcie@b30000000 {
Expand Down Expand Up @@ -1040,6 +1042,7 @@
#iommu-cells = <1>;
apple,dma-range = <0x0 0x80000000 0x0 0x80000000>;
apple,dma-offset = <0x100 0x0>;
#include "t602x-pciec-dart-tunables.dtsi"
};

DIE_NODE(apciec2): pcie@f30000000 {
Expand Down
15 changes: 15 additions & 0 deletions arch/arm64/boot/dts/apple/t602x-pciec-dart-tunables.dtsi
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Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* T602x Thunderbolt PCIe (PCIe-C) DART tunables, included in each
* apciec[0-2] DART node. iBoot adds "dart-tunables-instance-0" to the ADT
* at boot, but m1n1 does not copy it for these DARTs, and the DART cannot
* probe without it. Values read from J416c and J414s ADTs, identical on
* both machines and for all three ports. Offsets are relative to the
* DART's reg.
*/
apple,tunable = <0x20c 0xff0000b7 0xe40000b7>,
<0x220 0x000f0f0f 0x000f0f0f>,
<0x224 0x00ffffff 0x00080808>,
<0x300 0x00001f31 0x00000001>,
<0x308 0x3ffffffc 0x10000000>,
<0x310 0x3ffffffc 0x3ffffffc>;
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