Add: partial-good-aware AICPU thread resolution (a2a3/a5) - #1521
Add: partial-good-aware AICPU thread resolution (a2a3/a5)#1521yanghaoran29 wants to merge 1 commit into
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📝 WalkthroughWalkthroughAICPU thread configuration now uses ChangesAICPU auto-resolution
Estimated code review effort: 3 (Moderate) | ~25 minutes Sequence Diagram(s)sequenceDiagram
participant TestCase
participant DeviceRunner
participant TopologyProbe
participant Runtime
TestCase->>DeviceRunner: submit config with aicpu_thread_num=0
DeviceRunner->>TopologyProbe: probe usable AICPU cores
TopologyProbe-->>DeviceRunner: return usable count
DeviceRunner->>Runtime: write resolved thread count
Runtime-->>TestCase: launch with resolved configuration
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Verify each finding against current code. Fix only still-valid issues, skip the
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Inline comments:
In `@src/a2a3/platform/onboard/host/device_runner.cpp`:
- Around line 330-337: Keep the resolved AICPU count consistent across runtime
and launch/setup state: in src/a2a3/platform/onboard/host/device_runner.cpp
lines 330-337, propagate resolved_aicpu to launch_aicpu_num or use the updated
Runtime getter for subsequent calls; in
src/a2a3/platform/sim/host/device_runner.cpp lines 234-239 and
src/a5/platform/sim/host/device_runner.cpp lines 217-222, write each resolved
fallback value back via runtime.set_aicpu_thread_num(...).
In `@src/a2a3/platform/sim/host/device_runner.cpp`:
- Around line 234-239: After resolving the zero-value fallback in the launch
flow, write the resulting launch_aicpu_num back to the Runtime object before it
is passed to AICPU execution and setup. Update the existing runtime thread-count
state used by get_aicpu_thread_num(), while preserving configured nonzero values
and the PLATFORM_DEFAULT_AICPU_THREAD_NUM fallback.
In `@src/a5/platform/onboard/host/device_runner.cpp`:
- Around line 159-163: Update the launch_aicpu_num normalization in the device
runner to treat only aicpu_thread_num equal to zero as auto; preserve negative
values so validate_launch_aicpu_num() rejects them instead of converting them to
PLATFORM_DEFAULT_AICPU_THREAD_NUM.
- Around line 159-163: After the AICPU resolution logic that computes
resolved_aicpu, update Runtime unconditionally via
runtime.set_aicpu_thread_num(resolved_aicpu). Place this after the allowed-CPU
clamping path so both configured and auto modes publish the effective active
count, including when no adjustment branch is taken.
In `@src/a5/platform/sim/host/device_runner.cpp`:
- Around line 217-222: After resolving the platform default in the launch setup,
write the resulting launch_aicpu_num back through the Runtime setter so
runtime.get_aicpu_thread_num() matches the count used by init_l2_swimlane and
AICPU execution. Keep the existing explicit-count behavior unchanged.
In `@src/common/platform/onboard/host/device_runner_base.cpp`:
- Around line 1168-1174: Update the clamp warning in the thread-count
calculation to log desired instead of requested, so auto mode reports the
architecture default selected by the desired calculation. Preserve the existing
warning text, usable count, and scheduler count.
🪄 Autofix (Beta)
Fix all unresolved CodeRabbit comments on this PR:
- Push a commit to this branch (recommended)
- Create a new PR with the fixes
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📒 Files selected for processing (92)
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💤 Files with no reviewable changes (72)
- tests/st/a5/tensormap_and_ringbuffer/spmd_starvation/test_spmd_starvation.py
- examples/a2a3/tensormap_and_ringbuffer/benchmark_bgemm/test_benchmark_bgemm.py
- tests/st/a2a3/tensormap_and_ringbuffer/alternating_matmul_add/test_alternating_matmul_add.py
- examples/a2a3/tensormap_and_ringbuffer/merge_pipeline_barrier/test_merge_pipeline_barrier.py
- examples/a5/tensormap_and_ringbuffer/vector_example/test_vector_example.py
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- tests/st/a5/tensormap_and_ringbuffer/mixed_example/test_mixed_example.py
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- tests/st/a5/tensormap_and_ringbuffer/available_aicore_counts/test_available_aicore_counts.py
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- tests/st/a5/tensormap_and_ringbuffer/dfx/args_dump/test_args_dump.py
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- examples/a2a3/tensormap_and_ringbuffer/paged_attention_ringbuffer/test_paged_attention_ringbuffer.py
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- examples/a2a3/tensormap_and_ringbuffer/qwen3_14b_decode/test_qwen3_14b_decode.py
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- tests/st/a2a3/tensormap_and_ringbuffer/prepared_callable/test_prepared_callable.py
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aicpu_thread_num is now derived from the probed AICPU usable count and an
arch-default topology instead of a fixed user value that must stay <= usable:
- 0 (the new CallConfig/scene_test default) = auto ->
PLATFORM_DEFAULT_AICPU_THREAD_NUM (a2a3: 1 orch + 3 sched = 4; a5: 1 orch +
4 sched = 5).
- DeviceRunner clamps it to the probed usable pool (PG/OS cores are absent
from the AICPU OCCUPY bitmap), running 1 orch + fewer schedulers on a die
with fewer usable AICPU, and errors if usable < 2 (need >=1 orch + 1 sched).
- orch is always 1 (last thread), sched = total-1 (existing executor split).
validate_launch_aicpu_num allows 0 (auto). Sim resolves 0 -> arch default
(no real OCCUPY/PG) and writes the effective count back to Runtime so AICPU
init / DFX match the launch gate; onboard clamps via
DeviceRunnerBase::resolve_aicpu_thread_num and always publishes the resolved
count (a5 auto no longer leaves Runtime at the 0 sentinel). a5 normalizes
only ==0 as auto so negatives still fail validation. Clamp warnings log the
resolved desired count.
prepared_callable ST helpers use case.get("config", {}) after dropping the
fixed aicpu_thread_num override from CASES.
hardware.md (a2a3/a5) documents the policy and aligns the "user-accessible 6"
note with the active cap (4 a2a3 / 7 a5).
a5 host/device OCCUPY alignment (host 0x1fe=8 vs device 0x1f8=6) is deferred:
the new a5 default 5 <= 6 device-usable covers the common case; deeper
PG-degraded tolerance needs a5 onboard verification.
aicpu_thread_num is now derived from the probed AICPU usable count and an arch-default topology instead of a fixed user value that must stay <= usable:
validate_launch_aicpu_num allows 0 (auto). Sim resolves 0 -> arch default (no real OCCUPY/PG); onboard clamps via DeviceRunnerBase::resolve_aicpu_thread_num. hardware.md (a2a3/a5) documents the policy and aligns the "user-accessible 6" note with the active cap (4 a2a3 / 7 a5).
a5 host/device OCCUPY alignment (host 0x1fe=8 vs device 0x1f8=6) is deferred: the new a5 default 5 <= 6 device-usable covers the common case; deeper PG-degraded tolerance needs a5 onboard verification.