Refactor: consolidate per-task markers into one TaskAttrs byte (a5/tmr)#1433
Refactor: consolidate per-task markers into one TaskAttrs byte (a5/tmr)#1433ChaoZheng109 wants to merge 1 commit into
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Mirror of the a2a3/tmr consolidation (hw-native-sys#1402) to the a5 tensormap_and_ringbuffer runtime: fold the four scattered per-task markers into a single TaskAttrs byte on PTO2TaskSlotState, and revert active_mask to a pure subtask-slot mask. - Add TaskAttrs (pto_submit_types.h): bit0 allow_early_resolve, bit1 sync_start, bit2 has_predicate, bit3 is_timed, bits4-7 timing_tag. - Drop SYNC_START/HAS_PREDICATE flag bits and accessors from ActiveMask; it now carries only core_mask (bits 0-2). - Remove task_timing_slot from PTO2TaskDescriptor; the tag now rides the scheduler's hot slot_state line. Descriptor size/ABI (40B, packed_buffer_base offset) unchanged; PTO2TaskSlotState stays 64B (task_attrs reuses the byte allow_early_resolve occupied, alongside the atomic lifecycle_flags). - prepare_task writes task_attrs per submit alongside active_mask; attributes are assembled at each submit entry point (submit_task, submit_dummy_task, alloc_tensors). - Update all scheduler read sites (dispatch/completion/scheduler.h) to read the attributes off slot_state. - Static-assert NUM_TASK_TIMING_SLOTS <= 16 and TASK_TIMING_SLOT_NONE == -1 so the 4-bit tag field and the untagged sentinel stay coupled. Accessor naming matches the settled a2a3/tmr baseline: getters are predicates (allow_early_resolve / requires_sync_start / has_predicate / is_timed), setters are set_<concept> (set_early_resolve / set_sync_start / set_predicate / set_timing_slot). Behavior-neutral refactor. Verified: test_a5_wiring (cpput) plus a5sim st (predicated_dispatch, spmd_sync_start{,_early_dispatch,_stress,_mix_spill}, mixed_example, dummy_task, spmd_multiblock_mix). Part of hw-native-sys#1402.
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📝 WalkthroughWalkthroughChangesTask attribute scheduling migration
Estimated code review effort: 4 (Complex) | ~45 minutes Possibly related issues
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Folding the a5/tmr change into #1410 instead of a standalone PR, per request. |
Summary
Mirrors the a2a3/tmr consolidation (#1402) to the a5
tensormap_and_ringbufferruntime. Folds the four scattered per-task markers into a singleTaskAttrsbyte onPTO2TaskSlotStateand revertsactive_maskto a pure subtask-slot mask. a5/tmr was structurally identical to the a2a3 baseline, so this is a 1:1 port with the same settled design.Changes
TaskAttrs(pto_submit_types.h) — one byte:bit0allow_early_resolve,bit1sync_start,bit2has_predicate,bit3is_timed,bits4-7timing_tag (0..15).ActiveMaskreverts to pure subtask-slot mask — droppedSYNC_START/HAS_PREDICATEbits/accessors; onlycore_mask(bits 0-2) remains.task_timing_slotremoved fromPTO2TaskDescriptor— tag now rides the hotslot_stateline. Descriptor 40B /packed_buffer_baseoffset unchanged (ABI preserved).PTO2TaskSlotStatestays 64B.prepare_task; all scheduler read sites updated.static_assertcouples the 4-bit tag toNUM_TASK_TIMING_SLOTS <= 16/TASK_TIMING_SLOT_NONE == -1.allow_early_resolve/requires_sync_start/has_predicate/is_timed),set_<concept>setters.Testing
test_a5_wiring(cpput)Relation to #1402
a5/tmr mirror of the a2a3/tmr baseline. Remaining: a2a3
host_build_graph, a5host_build_graph(legacy path). Part of #1402.