refactor(dsv4): port #734 rope_cs collapse to HCA/SWA decode sparse kernels#763
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📝 WalkthroughWalkthroughThe changes simplify compressor pooling and cache finalization, and replace tiled inverse-RoPE precomputation with full-tensor core-group operations in HCA and SWA decode kernels. SWA valid-bias token processing also enables early resolution. ChangesDeepSeek decode kernel updates
Estimated code review effort: 3 (Moderate) | ~20 minutes Poem
🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
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Code Review
This pull request refactors the RoPE and RMSNorm computation blocks across several DeepSeek v4 decode models, fusing tasks into core-group level blocks and simplifying indexing and padding logic. However, in decode_compressor_ratio128.py, the changes incorrectly replace the dynamic batch size b_dim with the static constant B when slicing cos/sin tensors and when looping for cache writes. This breaks dynamic batch support and can lead to runtime out-of-bounds errors or incorrect behavior for varying batch sizes.
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| cos_b[0:B, 0 : ROPE_HEAD_DIM // 2] = cos[0:B, 0 : ROPE_HEAD_DIM // 2] | ||
| sin_b[0:B, 0 : ROPE_HEAD_DIM // 2] = sin[0:B, 0 : ROPE_HEAD_DIM // 2] |
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The compressor function compressor_ratio128 is designed to support dynamic batch sizes via b_dim (bound to B_DYN). Hardcoding the static constant B (which is 8) when slicing cos and sin will cause runtime out-of-bounds errors if the actual batch size at runtime is smaller than B, or ignore active rows if the batch size is larger. Use b_dim instead of B to preserve dynamic batch support.
| cos_b[0:B, 0 : ROPE_HEAD_DIM // 2] = cos[0:B, 0 : ROPE_HEAD_DIM // 2] | |
| sin_b[0:B, 0 : ROPE_HEAD_DIM // 2] = sin[0:B, 0 : ROPE_HEAD_DIM // 2] | |
| cos_b[0:b_dim, 0 : ROPE_HEAD_DIM // 2] = cos[0:b_dim, 0 : ROPE_HEAD_DIM // 2] | |
| sin_b[0:b_dim, 0 : ROPE_HEAD_DIM // 2] = sin[0:b_dim, 0 : ROPE_HEAD_DIM // 2] |
References
- In dynamic kernels, do not replace dynamic loop bounds with static padding constants, as it can cause over-iteration past the dynamic batch size.
| first_pos_b = pl.read(position_ids, [global_c_idx, 0]) | ||
| # cache write: reads only this block's own normed_kv rows, so the normed_kv RAW is | ||
| # intra-scope -- no separate task / cross-task barrier needed. | ||
| for inner in pl.range(B): |
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Similarly, the loop for writing to the cache should iterate over the dynamic batch size b_dim instead of the static constant B to ensure correct behavior for dynamic batch sizes.
| for inner in pl.range(B): | |
| for inner in pl.range(b_dim): |
References
- In dynamic kernels, do not replace dynamic loop bounds with static padding constants, as it can cause over-iteration past the dynamic batch size.
…code sparse kernels Collapse rope_cs from pl.spmd(HALF_ROPE // ROPE_TILE) (2 tasks) into a single pl.at(CORE_GROUP) operating on full ranges in both decode_sparse_attn_hca and decode_sparse_attn_swa; drop ROPE_TILE / ROPE_INTERLEAVE_TILE. Add allow_early_resolve to swa_valid_bias (parity with HCA build_valid / CSA's fused plan). Bit-identical math, just un-tiled -- mirrors what hw-native-sys#734 did in CSA's decode_sparse_attn.py. Both paths bit-exact PASS on a2a3 (x_out / kv_cache). Structural parity only; wall-neutral at standalone decode resolution.
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Summary
Ports the small sparse-kernel piece of CSA's #734 refactor to the HCA & SWA decode paths: collapse
rope_csfrom a 2-task spmd fan-out into a singlepl.at, matching what #734 did in CSA'sdecode_sparse_attn.py. Structural parity only — bit-exact, wall-neutral.Changes
decode_sparse_attn_hca.py/decode_sparse_attn_swa.py:rope_cspl.spmd(HALF_ROPE // ROPE_TILE)(2 tasks) → singlepl.at(CORE_GROUP)operating on full ranges; drop theROPE_TILE/ROPE_INTERLEAVE_TILEconstants. Bit-identical math, just un-tiled.decode_sparse_attn_swa.py: addallow_early_resolve=Truetoswa_valid_bias(parity with HCAbuild_validand CSA's fused plan).Validation (a2a3, real device)
Both bit-exact PASS:
decode_attention_hca.pye2e:x_out/kv_cachePASS.decode_attention_swa.pye2e:x_out/kv_cachePASS.Scope notes
compressor_ratio128task-count refactor (Refactor: cut runtime task count in DeepSeek-V4 decode CSA flow #734's scatter/pool/rmsnorm fusion + RMS_TILE drop). A same-session A/B showed it is wall-neutral at standalone decode resolution, so it was dropped to keep this PR minimal. The real HCA/SWA decode long poles (qk_pv,swa_gather_kv) are compute/bandwidth-bound and are being pursued separately.