Add base lightup support for most of the WASM intrinsics#130161
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Pull request overview
This PR extends CoreCLR JIT support for WASM SIMD “lightup” by wiring additional Vector/PackedSimd intrinsics through import/lowering, updating intrinsic metadata tables, and enabling some folding/value-numbering/assertion-range recognition for PackedSimd.Bitmask.
Changes:
- Adds WASM handling for
PackedSimd.Bitmaskin value numbering, folding, and assertion range analysis. - Extends WASM lowering for
Vector128Create and equality/inequality, and adds a lowering workaround forVector128<ulong>ordered compares. - Updates WASM intrinsic tables / xplat importer paths to light up more intrinsics and conversions.
Show a summary per file
| File | Description |
|---|---|
| src/coreclr/jit/valuenum.cpp | Treats PackedSimd.Bitmask similarly to xarch movemask for VN evaluation. |
| src/coreclr/jit/lowerwasm.cpp | Adds lowering for Vector.Create/CreateScalar and Vector equality/inequality; adds ulong ordered-compare fixup. |
| src/coreclr/jit/hwintrinsicwasm.cpp | Adjusts WASM special-import handling; changes default to unreached(). |
| src/coreclr/jit/hwintrinsiclistwasm.h | Enables additional PackedSimd intrinsics and reclassifies several as HW_Category_IMM / MemoryLoad. |
| src/coreclr/jit/hwintrinsiclist.h | Changes Vector.CreateScalarUnsafe metadata for non-xarch/non-arm64 targets. |
| src/coreclr/jit/hwintrinsic.h | Removes a stale TODO comment. |
| src/coreclr/jit/hwintrinsic.cpp | Removes the WASM “only Vector.Create” lightup gate; maps more Vector intrinsics to WASM equivalents or TODO returns. |
| src/coreclr/jit/gentree.cpp | Adds WASM implementations for some SIMD conversion/minmax/widen cases, but keeps CreateScalar/CreateScalarUnsafe as TODO returning null. |
| src/coreclr/jit/assertionprop.cpp | Treats PackedSimd.Bitmask similarly to xarch movemask for range inference. |
Copilot's findings
- Files reviewed: 9/9 changed files
- Comments generated: 7
This was referenced Jul 3, 2026
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CC. @dotnet/jit-contrib, @adamperlin this is ready for review and gets most of the WASM SIMD support ready. What's not covered will be handled in a separate PR after #130272 also goes in. |
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Thanks for the ping, I'll take a look today! |
adamperlin
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Jul 7, 2026
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Overall this looks good to me, I just had two small questions. Thank you for this work!
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Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara |
Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>
adamperlin
approved these changes
Jul 7, 2026
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This does not cover the cases which require more complex codegen/handling or which are dependent on Shuffle, GetElement, or WithElement
Diffs
It provides an 11.57% improvement to the WASM throughput for corelib crossgen. The asm output is a regression, namely due to intrinsics APIs actually being intrinsic and not eating the inlining budget, so the other hot code is meaningfully inlined instead. It should balance out more when the rest of the intrinsics are brought online but is itself an improvement in terms of perf and codegen.