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The Stray numbers are strong (GPU busy per present 303.4 to 173.1 ms, frame p50 449.3 to 331.5 ms, three interleaved rounds, spread small next to the gain), and the fallback to two lanes per invocation when the check rejects is the right shape. Turning this on by default for every device with 32-lane compute subgroups is where I don't agree yet.
- Everything measured is one Intel Arc (Meteor Lake) on ANV. "Wherever it was available under the switch" means NVIDIA and RDNA wave32 parts get a different compute layout for 1,130 of Stray's 1,751 programs without a run on either. Barrier-in-divergent-flow on a vendor that implements
OpControlBarrierdifferently is a hang orVK_ERROR_DEVICE_LOST, not a wrong picture. Please postspanned_uniformityplus the Stray (or any wave64-compute title) pair on an NVIDIA card and a Radeon, or keep the default off for vendors that haven't been run. - The description says the check treats a load from workgroup, storage or uniform memory at a uniform address as uniform, "not proven for memory another invocation writes without a barrier in between", and that a one-barrier ballot loss is unexplained. That is a known hole in the analysis that decides whether the program can hang, and it is being made the default path. Either close it (treat such a load as divergent unless a barrier dominates it, and see what fraction of the 1,130 still spans), or state the programs it affects and keep the switch default-off until the ballot loss is explained.
- The replay of 1,751 requests ran with a local switch that isn't in the PR, and found 0 rejections. A check that never rejects on its real corpus only shows the false-positive rate; the rejected cases are the hand-built eleven modules. It would help to have at least one real program from the corpus where the barrier sits under a divergent construct, to show the check reaches it on real SPIR-V.
APS5_SPANNED_WAVEis removed andAPS5_NO_SPANNED_WAVEadded. Is the spanning decision part of the shader disk cache key and the pipeline journal key? A cache written under the old switch must not serve a two-lane module to a spanned layout (or the other way round) after this default flips.- 858 added lines moving
Opcode,ResultandVisitIdOperandsbetween files alongside the new pass. Splitting the move out of the behavior change would make the pass reviewable.
…ormity check A spanned module is checked for barriers inside control flow that a per-invocation value decides, and falls back to two lanes per invocation when it has one, so the spanned layout no longer needs APS5_SPANNED_WAVE; APS5_NO_SPANNED_WAVE turns it off.
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What
#5405 runs a single-wave wave64 compute program at one guest lane per invocation, across two full 32-lane host subgroups. It is off unless
APS5_SPANNED_WAVEis set, because its cross-lane exchanges use workgroup barriers, and the emitter could not tell whether every invocation reaches them: its debt entry lists a manualspirv-disscan as the only check. This PR adds that check and turns the layout on by default.SpannedBarrierInDivergentFlow(SpirvSpannedUniformity.cpp) runs on every spanned module after emission. It marks the values that can differ between the invocations of a wave, iterating until nothing changes:LocalInvocationId/Index,GlobalInvocationId,SubgroupId,SubgroupLocalInvocationId, the subgroup masks);A selection is divergent when its condition is marked. A loop is divergent when its header condition is marked, or when it can be left from per-invocation control flow. The construct's blocks are read off the dominator tree: the header's subtree minus the merge's.
If an
OpControlBarrier, or a call that reaches one, sits in a divergent construct,EmitthrowsSpannedWaveUnsupported.Recompilealready catches that and emits the program at two lanes per invocation, so a rejected program runs as onmain. The check runs beforeSpirvEmitInfo::fullSubgroupsis set, so the fallback is not created withREQUIRE_FULL_SUBGROUPS.VulkanDeviceturns spanning on wherever it was available under the switch (computeFullSubgroupswith 32-lane compute subgroups).APS5_NO_SPANNED_WAVEturns it off;APS5_SPANNED_WAVEis gone.Opcode,ResultandVisitIdOperandsmove unchanged fromSpirvSpecialization.cpptoSpirvInstructionOperands.hpp, templated on the instruction container, so both passes share the operand table.SpirvSpecialization.cppkeeps its ownInstructionalias, which is the line perf(shader): keep a specialized module's instructions in one arena #7538 changes.The check treats a load of workgroup, storage or uniform memory at a uniform address as uniform. That is what the exchange slots rely on, but it is not proven for memory another invocation writes without a barrier in between. The debt entry is rewritten around that gap and the unexplained one-barrier ballot loss, and is now under the length limit.
Tested
Intel Arc (Meteor Lake), Mesa 26.2.4 ANV, Fedora 44, Linux 7.2.10, GCC 16.2.1, Release.
spanned_uniformity(new) builds eleven modules by hand:With
LocalInvocationIndexremoved from the per-invocation built-ins, the six lane-dependent cases fail.Stray's compute requests: all 1,751 (PPSA02101) replayed through
agc_shader_replaywith a 32-lane target and spanning on, using a local switch that is not part of this PR. 1,130 programs span, and the check rejects none of them. A Python prototype of the same analysis agrees.ctestonmain3bb15be09+ this PR:APS5_NO_SPANNED_WAVE=1:application_heap_scripting,application_heap_lazy,agc_driver_image_table_vouched_lookups,agc_driver_guest_memory_lifetime,agc_driver_multisample_retirement, plusguest_kernel_fcntl, which passes alone.application_heaptests fail.agc_driver_lds_mask_waterfallstill runs both modes and still spans.main7a015c094:spanned_uniformity,agc_shader_memory,agc_shader_disk_cache,agc_driver_lds_mask_waterfall,request_serializerandagc_driver_f32_denormal_flushpass on the Arc.Stray, frames 20 to 50 of the boot (
APS5_TRACE_FRAMES=20:30, 3840x2160).main+ fix(shader): keep host interpolation across entry EXEC copies #7811, againstmain+ this PR + fix(shader): keep host interpolation across entry EXEC copies #7811. Stray stops onmainwithout fix(shader): keep host interpolation across entry EXEC copies #7811 (AGC: since #6291, Stray (PPSA02101) stops on Intel Arc with "a pixel shader that reads barycentrics … needs a vertex shader before it" on a Geometry-path draw #7693).128b8c1f8is this PR's first push. The final head differs from it only in the helper header's template parameters.main+ #7811trace_digest.py, first capture of each:aps5-summary.jsonllines,main+ #7811:{"commit":"4b4d52f7d953","dirty":false,"env":{"APS5_PLAYGO_UNLISTED_CHUNKS":"absent","APS5_TRACE_FRAMES":"20:30"},"gpu":"Intel(R) Arc(tm) Graphics (MTL)","driver":"Intel open-source Mesa driver Mesa 26.2.4","os":"Linux 7.2.10-200.fc44.x86_64","resolution":"3840x2160","window":{"spec":"frames 20:30","first_present":20,"ms":13716.468},"presents":30,"frame_ms":{"p50":451.183,"p90":472.083,"p99":586.282,"max":586.282},"gpu_busy_ms_per_present":308.934,"worker_busy_pct":{"queue worker 0x0":96.582,"queue worker 0x20":97.047},"top_phases_ms_per_frame":{"Driver.Packet":882.201,"Driver.Packet.memory_wait":418.127,"Driver.Packet.device_lock":208.359,"Driver.Packet.prepare_memory":138.870,"Graphics.Draw":127.060,"Graphics.Draw.draw_and_resource_release":126.577,"Recorder.Submit":114.858,"Driver.Packet.dispatch":68.164},"trace_dropped":false,"trace":"aps5-trace-4b4d52f7d953-938192.json.gz"} {"commit":"4b4d52f7d953","dirty":false,"env":{"APS5_PLAYGO_UNLISTED_CHUNKS":"absent","APS5_TRACE_FRAMES":"20:30"},"gpu":"Intel(R) Arc(tm) Graphics (MTL)","driver":"Intel open-source Mesa driver Mesa 26.2.4","os":"Linux 7.2.10-200.fc44.x86_64","resolution":"3840x2160","window":{"spec":"frames 20:30","first_present":20,"ms":13995.080},"presents":30,"frame_ms":{"p50":464.151,"p90":479.730,"p99":509.222,"max":509.222},"gpu_busy_ms_per_present":312.990,"worker_busy_pct":{"queue worker 0x0":96.781,"queue worker 0x20":96.913},"top_phases_ms_per_frame":{"Driver.Packet":900.975,"Driver.Packet.memory_wait":428.313,"Driver.Packet.device_lock":205.633,"Driver.Packet.prepare_memory":148.125,"Graphics.Draw":128.606,"Graphics.Draw.draw_and_resource_release":128.151,"Recorder.Submit":107.255,"Driver.Packet.dispatch":72.186},"trace_dropped":false,"trace":"aps5-trace-4b4d52f7d953-940261.json.gz"} {"commit":"4b4d52f7d953","dirty":false,"env":{"APS5_PLAYGO_UNLISTED_CHUNKS":"absent","APS5_TRACE_FRAMES":"20:30"},"gpu":"Intel(R) Arc(tm) Graphics (MTL)","driver":"Intel open-source Mesa driver Mesa 26.2.4","os":"Linux 7.2.10-200.fc44.x86_64","resolution":"3840x2160","window":{"spec":"frames 20:30","first_present":20,"ms":13088.121},"presents":30,"frame_ms":{"p50":432.628,"p90":450.240,"p99":530.799,"max":530.799},"gpu_busy_ms_per_present":288.316,"worker_busy_pct":{"queue worker 0x0":96.056,"queue worker 0x20":96.773},"top_phases_ms_per_frame":{"Driver.Packet":837.222,"Driver.Packet.memory_wait":395.185,"Driver.Packet.device_lock":213.902,"Graphics.Draw":129.895,"Graphics.Draw.draw_and_resource_release":129.422,"Recorder.Submit":114.352,"Driver.Packet.prepare_memory":110.092,"Driver.Packet.dispatch":71.040},"trace_dropped":false,"trace":"aps5-trace-4b4d52f7d953-942091.json.gz"}This PR + #7811:
{"commit":"128b8c1f83c0","dirty":false,"env":{"APS5_PLAYGO_UNLISTED_CHUNKS":"absent","APS5_TRACE_FRAMES":"20:30"},"gpu":"Intel(R) Arc(tm) Graphics (MTL)","driver":"Intel open-source Mesa driver Mesa 26.2.4","os":"Linux 7.2.10-200.fc44.x86_64","resolution":"3840x2160","window":{"spec":"frames 20:30","first_present":20,"ms":10177.000},"presents":30,"frame_ms":{"p50":334.856,"p90":347.438,"p99":418.694,"max":418.694},"gpu_busy_ms_per_present":180.675,"worker_busy_pct":{"queue worker 0x0":95.362,"queue worker 0x20":96.360},"top_phases_ms_per_frame":{"Driver.Packet":646.122,"Driver.Packet.memory_wait":298.561,"Driver.Packet.device_lock":193.196,"Graphics.Draw":116.729,"Graphics.Draw.draw_and_resource_release":116.290,"Recorder.Submit":108.061,"Driver.Packet.dispatch":69.570,"Driver.Dispatch":64.534},"trace_dropped":false,"trace":"aps5-trace-128b8c1f83c0-939198.json.gz"} {"commit":"128b8c1f83c0","dirty":false,"env":{"APS5_PLAYGO_UNLISTED_CHUNKS":"absent","APS5_TRACE_FRAMES":"20:30"},"gpu":"Intel(R) Arc(tm) Graphics (MTL)","driver":"Intel open-source Mesa driver Mesa 26.2.4","os":"Linux 7.2.10-200.fc44.x86_64","resolution":"3840x2160","window":{"spec":"frames 20:30","first_present":20,"ms":9748.101},"presents":30,"frame_ms":{"p50":324.600,"p90":332.281,"p99":340.520,"max":340.520},"gpu_busy_ms_per_present":165.056,"worker_busy_pct":{"queue worker 0x0":95.368,"queue worker 0x20":97.098},"top_phases_ms_per_frame":{"Driver.Packet":622.706,"Driver.Packet.memory_wait":285.025,"Driver.Packet.device_lock":182.915,"Graphics.Draw":113.762,"Graphics.Draw.draw_and_resource_release":113.340,"Recorder.Submit":97.834,"Driver.Packet.dispatch":72.730,"Driver.Dispatch":68.024},"trace_dropped":false,"trace":"aps5-trace-128b8c1f83c0-941263.json.gz"} {"commit":"128b8c1f83c0","dirty":false,"env":{"APS5_PLAYGO_UNLISTED_CHUNKS":"absent","APS5_TRACE_FRAMES":"20:30"},"gpu":"Intel(R) Arc(tm) Graphics (MTL)","driver":"Intel open-source Mesa driver Mesa 26.2.4","os":"Linux 7.2.10-200.fc44.x86_64","resolution":"3840x2160","window":{"spec":"frames 20:30","first_present":20,"ms":10014.061},"presents":30,"frame_ms":{"p50":334.968,"p90":340.775,"p99":354.031,"max":354.031},"gpu_busy_ms_per_present":173.489,"worker_busy_pct":{"queue worker 0x0":95.324,"queue worker 0x20":96.938},"top_phases_ms_per_frame":{"Driver.Packet":639.070,"Driver.Packet.memory_wait":298.617,"Driver.Packet.device_lock":189.827,"Graphics.Draw":115.684,"Graphics.Draw.draw_and_resource_release":115.257,"Recorder.Submit":104.396,"Driver.Packet.dispatch":72.309,"Driver.Dispatch":68.740},"trace_dropped":false,"trace":"aps5-trace-128b8c1f83c0-943100.json.gz"}Traces, digests and summaries:
ThatsLeo:evidence/spanned-default.Not tested:
Checklist
main; no other open PR implements the same functionsNotImplemented_nid_no_patch); silent stubs are listed under Silent stubs in their library's technical debt file.mdfiles or images added to the repository (attach them to this PR)