Skip to content

fix(libkernel): report the read bit of every write bit in a mapping's protection - #6825

Open
hugodearaujo wants to merge 1 commit into
boykopovar:mainfrom
hugodearaujo:fix/report-implied-read-protection
Open

hugodearaujo wants to merge 1 commit into
boykopovar:mainfrom
hugodearaujo:fix/report-implied-read-protection

Conversation

@hugodearaujo

Copy link
Copy Markdown
Contributor

What

On a PS5 a write bit in a mapping's protection is always reported with its read bit. After a map or a protection change, sceKernelVirtualQuery and sceKernelQueryMemoryProtection show CPU write 0x2 together with CPU read 0x1, 0x80 with 0x40 and 0x200 with 0x100. GPU write 0x20 is the exception: it does not bring GPU read 0x10. Here the requested protection was reported as it was passed, so a write-only request read back without its read bit.

RecordProtection now adds those read bits to the protection it records, which is what both queries report. The host protection does not change: it already lets a written page be read.

Titles

  • Hollow Knight: Silksong (PPSA12544, my own dump), 141 s from launch into gameplay with APS5_TRACE_MEMORY=1 and a local trace of the query: 44 of its 53 direct maps use 0xc2 (CPU write and 0x40/0x80, no CPU read), and it calls sceKernelVirtualQuery 4,074 times, 3,305 of them answered with 0xc2 and 533 with 0xf2 here. The console reports those ranges as 0xc3 and 0xf3.
  • ASTRO BOT (PPSA21567, my own dump), 75 s from launch with APS5_TRACE_MEMORY=1: six direct maps with 0xf2, protection changes to 0xf2 (two) and 0x12 (one), and a flexible map with 0x2, which the console reports as 0xf3, 0x13 and 0x3. It did not call the queries in two runs of about 170 and 200 s.
  • Onimusha: Way of the Sword (PPSA27836 01.000.001) maps direct memory with 0xf2 and then protects it with 0xfffffff2 (TechnicalDebt, sceKernelMprotect protection bits). The console reports 0xf3 and then 0x3f3; this emulator reported 0xf2 and 0x3f2.

Measured

PS5, firmware 13.60, from a homebrew payload process that calls the system's own libkernel through dlopen/dlsym. The protection passed, and what sceKernelQueryMemoryProtection reported afterwards (sceKernelVirtualQuery agreed in every case):

requested sceKernelMapFlexibleMemory sceKernelMapDirectMemory sceKernelMprotect, flexible and direct
0x1 0x1 0x1 0x1
0x2 0x3 0x3 0x3
0x12 0x13 0x13 0x13
0x20 0x20 0x20 0x20
0x22 0x23 0x23 0x23
0x30 0x30 0x30 0x30
0x40 0x40 0x40 0x40
0x80 0xc0 0xc0 0xc0
0x82 0xc3 0xc3 0xc3
0x100 0x100 0x100 0x100
0x200 0x300 0x300 0x300
0x220 0x320 0x320 0x320
0x2a2 0x3e3 0x3e3 0x3e3
0xf2 0xf3 0xf3 0xf3
0x3f2 0x3f3 0x3f3 0x3f3
0xfffffff2 EINVAL EINVAL 0x3f3

sceKernelMtypeprotect on direct memory gave 0x3 for 0x2, 0x33 for 0x32 and 0xf3 for 0xf2, and POSIX mmap and mprotect with PROT_WRITE gave 0x3.

What the console does there that this PR does not model is now in TechnicalDebt: it dropped the CPU execute bit 0x4 from flexible, direct and JIT memory of the payload process (a title process may keep it); POSIX mprotect with write and execute reported 0x2, without the read bit; and the map calls and sceKernelMtypeprotect refused bits outside 0x3F7 with EINVAL, where this emulator throws.

Probe output (PS5 firmware 13.60, payload process)
MAPFLEX|req=00000001|rc=00000000|prot=00000001|vprot=00000001
MAPFLEX|req=00000002|rc=00000000|prot=00000003|vprot=00000003
MAPFLEX|req=00000004|rc=00000000|prot=00000000|vprot=00000000
MAPFLEX|req=00000008|rc=80020016
MAPFLEX|req=00000010|rc=00000000|prot=00000010|vprot=00000010
MAPFLEX|req=00000020|rc=00000000|prot=00000020|vprot=00000020
MAPFLEX|req=00000040|rc=00000000|prot=00000040|vprot=00000040
MAPFLEX|req=00000080|rc=00000000|prot=000000c0|vprot=000000c0
MAPFLEX|req=00000100|rc=00000000|prot=00000100|vprot=00000100
MAPFLEX|req=00000200|rc=00000000|prot=00000300|vprot=00000300
MAPFLEX|req=00000400|rc=80020016
MAPFLEX|req=00000800|rc=80020016
MAPFLEX|req=00000000|rc=00000000|prot=00000000|vprot=00000000
MAPFLEX|req=00000003|rc=00000000|prot=00000003|vprot=00000003
MAPFLEX|req=00000005|rc=00000000|prot=00000001|vprot=00000001
MAPFLEX|req=00000006|rc=00000000|prot=00000003|vprot=00000003
MAPFLEX|req=00000007|rc=00000000|prot=00000003|vprot=00000003
MAPFLEX|req=00000012|rc=00000000|prot=00000013|vprot=00000013
MAPFLEX|req=00000021|rc=00000000|prot=00000021|vprot=00000021
MAPFLEX|req=00000022|rc=00000000|prot=00000023|vprot=00000023
MAPFLEX|req=00000024|rc=00000000|prot=00000020|vprot=00000020
MAPFLEX|req=00000030|rc=00000000|prot=00000030|vprot=00000030
MAPFLEX|req=00000042|rc=00000000|prot=00000043|vprot=00000043
MAPFLEX|req=00000082|rc=00000000|prot=000000c3|vprot=000000c3
MAPFLEX|req=000000c0|rc=00000000|prot=000000c0|vprot=000000c0
MAPFLEX|req=000000c2|rc=00000000|prot=000000c3|vprot=000000c3
MAPFLEX|req=00000102|rc=00000000|prot=00000103|vprot=00000103
MAPFLEX|req=00000202|rc=00000000|prot=00000303|vprot=00000303
MAPFLEX|req=00000300|rc=00000000|prot=00000300|vprot=00000300
MAPFLEX|req=00000302|rc=00000000|prot=00000303|vprot=00000303
MAPFLEX|req=00000220|rc=00000000|prot=00000320|vprot=00000320
MAPFLEX|req=00000222|rc=00000000|prot=00000323|vprot=00000323
MAPFLEX|req=000002a2|rc=00000000|prot=000003e3|vprot=000003e3
MAPFLEX|req=000000f2|rc=00000000|prot=000000f3|vprot=000000f3
MAPFLEX|req=000003f2|rc=00000000|prot=000003f3|vprot=000003f3
MAPFLEX|req=000003f7|rc=00000000|prot=000003f3|vprot=000003f3
MAPFLEX|req=000003ff|rc=80020016
MAPFLEX|req=fffffff2|rc=80020016
MPROT|kind=flexible|req=00000001|rc=00000000|prot=00000001|vprot=00000001
MPROT|kind=flexible|req=00000002|rc=00000000|prot=00000003|vprot=00000003
MPROT|kind=flexible|req=00000004|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=flexible|req=00000008|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=flexible|req=00000010|rc=00000000|prot=00000010|vprot=00000010
MPROT|kind=flexible|req=00000020|rc=00000000|prot=00000020|vprot=00000020
MPROT|kind=flexible|req=00000040|rc=00000000|prot=00000040|vprot=00000040
MPROT|kind=flexible|req=00000080|rc=00000000|prot=000000c0|vprot=000000c0
MPROT|kind=flexible|req=00000100|rc=00000000|prot=00000100|vprot=00000100
MPROT|kind=flexible|req=00000200|rc=00000000|prot=00000300|vprot=00000300
MPROT|kind=flexible|req=00000400|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=flexible|req=00000800|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=flexible|req=00000000|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=flexible|req=00000003|rc=00000000|prot=00000003|vprot=00000003
MPROT|kind=flexible|req=00000005|rc=00000000|prot=00000001|vprot=00000001
MPROT|kind=flexible|req=00000006|rc=00000000|prot=00000003|vprot=00000003
MPROT|kind=flexible|req=00000007|rc=00000000|prot=00000003|vprot=00000003
MPROT|kind=flexible|req=00000012|rc=00000000|prot=00000013|vprot=00000013
MPROT|kind=flexible|req=00000021|rc=00000000|prot=00000021|vprot=00000021
MPROT|kind=flexible|req=00000022|rc=00000000|prot=00000023|vprot=00000023
MPROT|kind=flexible|req=00000024|rc=00000000|prot=00000020|vprot=00000020
MPROT|kind=flexible|req=00000030|rc=00000000|prot=00000030|vprot=00000030
MPROT|kind=flexible|req=00000042|rc=00000000|prot=00000043|vprot=00000043
MPROT|kind=flexible|req=00000082|rc=00000000|prot=000000c3|vprot=000000c3
MPROT|kind=flexible|req=000000c0|rc=00000000|prot=000000c0|vprot=000000c0
MPROT|kind=flexible|req=000000c2|rc=00000000|prot=000000c3|vprot=000000c3
MPROT|kind=flexible|req=00000102|rc=00000000|prot=00000103|vprot=00000103
MPROT|kind=flexible|req=00000202|rc=00000000|prot=00000303|vprot=00000303
MPROT|kind=flexible|req=00000300|rc=00000000|prot=00000300|vprot=00000300
MPROT|kind=flexible|req=00000302|rc=00000000|prot=00000303|vprot=00000303
MPROT|kind=flexible|req=00000220|rc=00000000|prot=00000320|vprot=00000320
MPROT|kind=flexible|req=00000222|rc=00000000|prot=00000323|vprot=00000323
MPROT|kind=flexible|req=000002a2|rc=00000000|prot=000003e3|vprot=000003e3
MPROT|kind=flexible|req=000000f2|rc=00000000|prot=000000f3|vprot=000000f3
MPROT|kind=flexible|req=000003f2|rc=00000000|prot=000003f3|vprot=000003f3
MPROT|kind=flexible|req=000003f7|rc=00000000|prot=000003f3|vprot=000003f3
MPROT|kind=flexible|req=000003ff|rc=00000000|prot=000003f3|vprot=000003f3
MPROT|kind=flexible|req=fffffff2|rc=00000000|prot=000003f3|vprot=000003f3
MTYPE|kind=flexible|type=0|req=00000003|rc=8002002d|prot=00000003|vprot=00000003
MTYPE|kind=flexible|type=0|req=00000002|rc=8002002d|prot=00000003|vprot=00000003
MTYPE|kind=flexible|type=0|req=00000032|rc=8002002d|prot=00000003|vprot=00000003
MTYPE|kind=flexible|type=0|req=000000f2|rc=8002002d|prot=00000003|vprot=00000003
MTYPE|kind=flexible|type=0|req=000003f7|rc=8002000d|prot=00000003|vprot=00000003
MTYPE|kind=flexible|type=0|req=fffffff2|rc=80020016|prot=00000003|vprot=00000003
MAPDIRECT|req=00000001|rc=00000000|prot=00000001|vprot=00000001
MAPDIRECT|req=00000002|rc=00000000|prot=00000003|vprot=00000003
MAPDIRECT|req=00000004|rc=80020016
MAPDIRECT|req=00000008|rc=80020016
MAPDIRECT|req=00000010|rc=00000000|prot=00000010|vprot=00000010
MAPDIRECT|req=00000020|rc=00000000|prot=00000020|vprot=00000020
MAPDIRECT|req=00000040|rc=00000000|prot=00000040|vprot=00000040
MAPDIRECT|req=00000080|rc=00000000|prot=000000c0|vprot=000000c0
MAPDIRECT|req=00000100|rc=00000000|prot=00000100|vprot=00000100
MAPDIRECT|req=00000200|rc=00000000|prot=00000300|vprot=00000300
MAPDIRECT|req=00000400|rc=80020016
MAPDIRECT|req=00000800|rc=80020016
MAPDIRECT|req=00000000|rc=00000000|prot=00000000|vprot=00000000
MAPDIRECT|req=00000003|rc=00000000|prot=00000003|vprot=00000003
MAPDIRECT|req=00000005|rc=80020016
MAPDIRECT|req=00000006|rc=80020016
MAPDIRECT|req=00000007|rc=80020016
MAPDIRECT|req=00000012|rc=00000000|prot=00000013|vprot=00000013
MAPDIRECT|req=00000021|rc=00000000|prot=00000021|vprot=00000021
MAPDIRECT|req=00000022|rc=00000000|prot=00000023|vprot=00000023
MAPDIRECT|req=00000024|rc=80020016
MAPDIRECT|req=00000030|rc=00000000|prot=00000030|vprot=00000030
MAPDIRECT|req=00000042|rc=00000000|prot=00000043|vprot=00000043
MAPDIRECT|req=00000082|rc=00000000|prot=000000c3|vprot=000000c3
MAPDIRECT|req=000000c0|rc=00000000|prot=000000c0|vprot=000000c0
MAPDIRECT|req=000000c2|rc=00000000|prot=000000c3|vprot=000000c3
MAPDIRECT|req=00000102|rc=00000000|prot=00000103|vprot=00000103
MAPDIRECT|req=00000202|rc=00000000|prot=00000303|vprot=00000303
MAPDIRECT|req=00000300|rc=00000000|prot=00000300|vprot=00000300
MAPDIRECT|req=00000302|rc=00000000|prot=00000303|vprot=00000303
MAPDIRECT|req=00000220|rc=00000000|prot=00000320|vprot=00000320
MAPDIRECT|req=00000222|rc=00000000|prot=00000323|vprot=00000323
MAPDIRECT|req=000002a2|rc=00000000|prot=000003e3|vprot=000003e3
MAPDIRECT|req=000000f2|rc=00000000|prot=000000f3|vprot=000000f3
MAPDIRECT|req=000003f2|rc=00000000|prot=000003f3|vprot=000003f3
MAPDIRECT|req=000003f7|rc=80020016
MAPDIRECT|req=000003ff|rc=80020016
MAPDIRECT|req=fffffff2|rc=80020016
MPROT|kind=direct|req=00000001|rc=00000000|prot=00000001|vprot=00000001
MPROT|kind=direct|req=00000002|rc=00000000|prot=00000003|vprot=00000003
MPROT|kind=direct|req=00000004|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=direct|req=00000008|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=direct|req=00000010|rc=00000000|prot=00000010|vprot=00000010
MPROT|kind=direct|req=00000020|rc=00000000|prot=00000020|vprot=00000020
MPROT|kind=direct|req=00000040|rc=00000000|prot=00000040|vprot=00000040
MPROT|kind=direct|req=00000080|rc=00000000|prot=000000c0|vprot=000000c0
MPROT|kind=direct|req=00000100|rc=00000000|prot=00000100|vprot=00000100
MPROT|kind=direct|req=00000200|rc=00000000|prot=00000300|vprot=00000300
MPROT|kind=direct|req=00000400|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=direct|req=00000800|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=direct|req=00000000|rc=00000000|prot=00000000|vprot=00000000
MPROT|kind=direct|req=00000003|rc=00000000|prot=00000003|vprot=00000003
MPROT|kind=direct|req=00000005|rc=00000000|prot=00000001|vprot=00000001
MPROT|kind=direct|req=00000006|rc=00000000|prot=00000003|vprot=00000003
MPROT|kind=direct|req=00000007|rc=00000000|prot=00000003|vprot=00000003
MPROT|kind=direct|req=00000012|rc=00000000|prot=00000013|vprot=00000013
MPROT|kind=direct|req=00000021|rc=00000000|prot=00000021|vprot=00000021
MPROT|kind=direct|req=00000022|rc=00000000|prot=00000023|vprot=00000023
MPROT|kind=direct|req=00000024|rc=00000000|prot=00000020|vprot=00000020
MPROT|kind=direct|req=00000030|rc=00000000|prot=00000030|vprot=00000030
MPROT|kind=direct|req=00000042|rc=00000000|prot=00000043|vprot=00000043
MPROT|kind=direct|req=00000082|rc=00000000|prot=000000c3|vprot=000000c3
MPROT|kind=direct|req=000000c0|rc=00000000|prot=000000c0|vprot=000000c0
MPROT|kind=direct|req=000000c2|rc=00000000|prot=000000c3|vprot=000000c3
MPROT|kind=direct|req=00000102|rc=00000000|prot=00000103|vprot=00000103
MPROT|kind=direct|req=00000202|rc=00000000|prot=00000303|vprot=00000303
MPROT|kind=direct|req=00000300|rc=00000000|prot=00000300|vprot=00000300
MPROT|kind=direct|req=00000302|rc=00000000|prot=00000303|vprot=00000303
MPROT|kind=direct|req=00000220|rc=00000000|prot=00000320|vprot=00000320
MPROT|kind=direct|req=00000222|rc=00000000|prot=00000323|vprot=00000323
MPROT|kind=direct|req=000002a2|rc=00000000|prot=000003e3|vprot=000003e3
MPROT|kind=direct|req=000000f2|rc=00000000|prot=000000f3|vprot=000000f3
MPROT|kind=direct|req=000003f2|rc=00000000|prot=000003f3|vprot=000003f3
MPROT|kind=direct|req=000003f7|rc=00000000|prot=000003f3|vprot=000003f3
MPROT|kind=direct|req=000003ff|rc=00000000|prot=000003f3|vprot=000003f3
MPROT|kind=direct|req=fffffff2|rc=00000000|prot=000003f3|vprot=000003f3
MTYPE|kind=direct|type=0|req=00000003|rc=00000000|prot=00000003|vprot=00000003
MTYPE|kind=direct|type=0|req=00000002|rc=00000000|prot=00000003|vprot=00000003
MTYPE|kind=direct|type=0|req=00000032|rc=00000000|prot=00000033|vprot=00000033
MTYPE|kind=direct|type=0|req=000000f2|rc=00000000|prot=000000f3|vprot=000000f3
MTYPE|kind=direct|type=0|req=000003f7|rc=8002000d|prot=00000033|vprot=00000033
MTYPE|kind=direct|type=0|req=fffffff2|rc=80020016|prot=00000033|vprot=00000033
MMAP|req=2|ok=1|qrc=00000000|prot=00000003
MMAP|req=1|ok=1|qrc=00000000|prot=00000001
MMAP|req=3|ok=1|qrc=00000000|prot=00000003
MMAP|req=4|ok=1|qrc=00000000|prot=00000000
MMAP|req=6|ok=1|qrc=00000000|prot=00000002
MMAP|req=0|ok=1|qrc=00000000|prot=00000000
MPROTECT|req=2|rc=0|qrc=00000000|prot=00000003
MPROTECT|req=1|rc=0|qrc=00000000|prot=00000001
MPROTECT|req=3|rc=0|qrc=00000000|prot=00000003
MPROTECT|req=4|rc=0|qrc=00000000|prot=00000000
MPROTECT|req=6|rc=0|qrc=00000000|prot=00000002
MPROTECT|req=0|rc=0|qrc=00000000|prot=00000000

Tested

  • New test guest_protection_report: maps flexible memory write-only, then changes its protection with sceKernelMprotect through 19 of the values above, with POSIX mprotect and PROT_WRITE, and maps direct memory with 0xf2 and protects it with 0xfffffff2, checking both queries each time. With RecordProtection as on main, it fails at its first check (a write-only flexible mapping: reported 0x2 (virtual query) and 0x2 (protection query), expected 0x3).
  • Linux (Arch, kernel 7.2.9, GCC 16.2.1, Release, RX 9070 XT with RADV, Mesa 26.2.4): full CTest with -j8 on main (82ddae75b) and on this branch. 1286 of 1288 pass here. agc_driver_tessellation fails as on main, and agc_driver_preparation_scope_settle failed in the -j8 run, which shared the machine with a Windows VM build; it passes 5 of 5 alone on this branch and on main, and perf(agc): take the host import budget from the device's memory budget #6479 lists it as a parallel-load flake.
  • Windows Server 2025 VM, WinLibs GCC 15.2, Release, BUILD_TESTING=ON, GPU tests skipped: main (82ddae75b) does not build GpuIndirectArgumentsMisalignedWriterAhead.cpp with MinGW (alignas(65536) is above the object file's maximum of 8192; agc tests: GpuIndirectArgumentsMisalignedWriterAhead.cpp does not compile with MinGW GCC (alignas(65536)) #6716, test(agc): align the indirect arguments block at run time #6452), so main and this branch were built with ninja -k 0 and that test does not run. guest_protection_report, guest_mprotect_unmapped and guest_memory pass. 1320 of 1322 pass; the other failure is guest_kqueue (0xc0000409), as on main, where guest_shader_link and agc_shader_helpers also timed out.
  • tools/check_conventions.py passes. tools/pr_overlap.py lists feat(libkernel): map regular files with mmap on Windows #6542, which edits the TechnicalDebt line after the one this PR rewrites, and nothing else.

Checklist

  • Based on current main; no other open PR implements the same functions
  • One topic per PR; follow-ups go in a new PR
  • No comments in code except technical debt
  • Unimplemented paths throw (NotImplemented_nid_no_patch); silent stubs are listed in TechnicalDebt
  • No notes, investigation .md files or images added to the repository (attach them to this PR)
  • New third-party code is a submodule built from source
  • Generic behaviour, not specific to one title
  • Depends on: none
  • AI-assisted: yes

🤖 Generated with Claude Code

… protection

A PS5 (firmware 13.60) reports CPU write 0x2 with CPU read 0x1, 0x80 with 0x40 and 0x200 with 0x100 after a map, sceKernelMprotect, sceKernelMtypeprotect or POSIX mprotect; GPU write 0x20 keeps GPU read 0x10 clear. sceKernelVirtualQuery and sceKernelQueryMemoryProtection now report the protection that way.
@github-actions

github-actions Bot commented Oct 16, 2026 •

Copy link
Copy Markdown

Some comparisons could not be completed because a pull request conflicts with the base branch. Review these shared files manually before concluding that there is no overlap.

Pull request Shared files not compared
PR 4449 core/libs/prx/libkernel/DirectMemory/DirectMemory.cpp
PR 4563 core/libs/prx/libkernel/CMakeLists.txt
PR 4630 docs/dev/debt/libkernel.md
PR 4972 core/libs/prx/libkernel/CMakeLists.txt
PR 5021 core/libs/prx/libkernel/CMakeLists.txt
core/libs/prx/libkernel/DirectMemory/DirectMemory.cpp
docs/dev/debt/libkernel.md
PR 6044 core/libs/prx/libkernel/CMakeLists.txt
PR 6149 docs/dev/debt/libkernel.md
PR 6226 core/libs/prx/libkernel/CMakeLists.txt
PR 6446 docs/dev/debt/libkernel.md
PR 6469 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 6519 docs/dev/debt/libkernel.md
PR 6586 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 6658 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 6663 docs/dev/debt/libkernel.md
PR 6711 core/libs/prx/libkernel/CMakeLists.txt
PR 6830 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 6833 docs/dev/debt/libkernel.md
PR 6836 docs/dev/debt/libkernel.md
PR 6879 core/libs/prx/libkernel/DirectMemory/DirectMemory.cpp
PR 6893 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 6908 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 6915 docs/dev/debt/libkernel.md
PR 6936 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 6942 core/libs/prx/libkernel/CMakeLists.txt
PR 6977 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 7039 docs/dev/debt/libkernel.md
PR 7049 docs/dev/debt/libkernel.md
PR 7070 docs/dev/debt/libkernel.md
PR 7075 docs/dev/debt/libkernel.md
PR 7088 docs/dev/debt/libkernel.md
PR 7090 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 7105 core/libs/prx/libkernel/DirectMemory/DirectMemory.cpp
docs/dev/debt/libkernel.md
PR 7121 docs/dev/debt/libkernel.md
PR 7129 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 7135 docs/dev/debt/libkernel.md
PR 7149 core/libs/prx/libkernel/DirectMemory/DirectMemory.cpp
docs/dev/debt/libkernel.md
PR 7156 core/libs/prx/libkernel/CMakeLists.txt
PR 7192 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 7201 core/libs/prx/libkernel/CMakeLists.txt
core/libs/prx/libkernel/DirectMemory/DirectMemory.cpp
PR 7299 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 7332 core/libs/prx/libkernel/CMakeLists.txt
core/libs/prx/libkernel/DirectMemory/DirectMemory.cpp
docs/dev/debt/libkernel.md
PR 7403 docs/dev/debt/libkernel.md
PR 7437 docs/dev/debt/libkernel.md
PR 7447 docs/dev/debt/libkernel.md
PR 7450 core/libs/prx/libkernel/CMakeLists.txt
PR 7464 core/libs/prx/libkernel/CMakeLists.txt
docs/dev/debt/libkernel.md
PR 7468 core/libs/prx/libkernel/DirectMemory/DirectMemory.cpp
PR 7509 docs/dev/debt/libkernel.md
PR 7511 docs/dev/debt/libkernel.md
PR 7530 docs/dev/debt/libkernel.md
PR 7539 docs/dev/debt/libkernel.md
PR 7541 docs/dev/debt/libkernel.md
PR 7542 docs/dev/debt/libkernel.md
PR 7543 docs/dev/debt/libkernel.md
PR 7551 docs/dev/debt/libkernel.md
PR 7554 docs/dev/debt/libkernel.md
PR 7556 docs/dev/debt/libkernel.md
PR 7565 docs/dev/debt/libkernel.md
PR 7605 docs/dev/debt/libkernel.md
PR 7611 docs/dev/debt/libkernel.md
PR 7631 core/libs/prx/libkernel/DirectMemory/DirectMemory.cpp
PR 7652 core/libs/prx/libkernel/CMakeLists.txt
PR 7653 docs/dev/debt/libkernel.md
PR 7654 docs/dev/debt/libkernel.md
PR 7675 docs/dev/debt/libkernel.md

@github-actions github-actions Bot added the needs rebase Conflicts with main, rebase needed label Oct 19, 2026

This branch has not been deployed

No deployments
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

build docs libkernel needs rebase Conflicts with main, rebase needed

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant