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A note on overlap: #6612 (Crimson Desert, PPSA25286, opened 10-15) also takes a registered type-3 program at 0x148 with nothing at 0x108, in the same lines of The two handle it differently. #6612 compiles the program twice: once as the local role, with no hull threads in Crimson Desert's merged hull draw has If this lands first, I'll move #6612 onto your merged hull, drop its type-3 split, and check that Crimson Desert gets as far as before. AI-assisted: yes |
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Other open pull requests touch the same code. Merging one will break the other, or both implement the same thing. If this one builds on them, list them in Depends on.
Some comparisons could not be completed because a pull request conflicts with the base branch. Review these shared files manually before concluding that there is no overlap.
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Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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A heads-up on the request version: #5884 merged with version 31 for AI-assisted: yes |
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Thanks @milescoviello, good catch: after #5884 this PR still merged cleanly with AI-assisted: yes (Claude Code) |
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Fresh Windows11/RTX5070Ti617.42 cross-test on current integrationc6bd8b539047dacb9ddc95b41c45e69b78d39f19 (main d9b696d + shared-table/007 boot stack + canonical #6679 36529f1 and #6364 9fffcea; #4339 excluded):30/30 selected native controls PASS15.94s, no skips. Includes storage_flush_ordering, storage_write_back_overhang, depth_storage_dispatch, tessellation, prepared_graphics and its unset/0/1 prebuild cases, serializer, shader memory/disk cache, shared tables and draw-cache checks. 6364 negative control: retained the new fixture and other integration code, removed only FlushPending's PendingWriterSerial/Reap/Sync/FinishUpTo wait block, rebuilt the unpatched driver and ran the fixture. It FAILS in0.37s with Public branch https://github.com/Scramblrrrr/AnyPS5/tree/codex/first-light-level-two-lane . Matched driver/Agc/VideoOut now staged together, same2GiBfree/28GiBprivate guard. Starting007; title level/cinematic outcome still pending, so the native pass is not claimed as playable gameplay. AI-assisted: Codex; title data local. |
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@milescoviello #6679 is rebased onto AI-assisted: yes (Claude Code) |
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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@SleglJan a heads-up: this PR conflicts with I rebased your commit onto
The conflicts were all version numbers: the writer, the reader limit, and the tests' expected bytes. I'm running the serializer and tessellation tests on it now and will post the results here. I'll restack #6612 on whatever head you choose. AI-assisted: yes (Claude Code) |
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@SleglJan results for AI-assisted: yes (Claude Code) |
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@milescoviello thanks, that saved me the work. I took your 1254a68 as is. Since then
The request version is 35, as in your branch. Tests are in the description: on the Linux node, the serializer, tessellation, prepared-graphics and journal tests pass, and the AI-assisted: yes (Claude Code) |
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@SleglJan thanks. I've restacked #6612 on 4e7fa2b locally: its three commits now sit on your head instead of the previous one. Two conflicts, both from
The result merges cleanly with AI-assisted: yes (Claude Code) |
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d: local, hull, domain and NGG geometry stages, the hull halves merged in one registered type-3 program, the domain and geometry halves in one type-2 program. The domain half runs as the tessellation evaluation stage and captures each vertex's ESGS item, and a mesh shader runs the geometry half on the captured items. Registered type-3 merged hulls come from boykopovar#6679; this adds 16-bit LDS reads and writes in tessellation stages, which Crimson Desert's merged hull uses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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@SleglJan #6612 is pushed on top of 4e7fa2b (head 9825024). On the Linux node (RTX 4070 Ti), the AGC, shader, request, journal and tessellation set passes 609 of 610 with it, against 608 of 609 on 4e7fa2b alone. The one failure on both is AI-assisted: yes (Claude Code) |
A registered type-3 hull program holds the local and the hull part of a
tessellation draw in one binary, addressed through SPI_SHADER_PGM_LO_LS
(SH 0x148) with no SPI_SHADER_PGM_LO_HS: the local part runs on the lanes
below s3[7:0] and writes LDS, an s_barrier follows, and the hull part runs
on the lanes below s3[15:8] and may store the registers the local part
filled. The draw decode asked 0x148 for a type-5 local half, and
PPSA11386 (007 First Light) stopped in its level load with "registered
program refers to an incompatible shader binary type".
The draw decode now gives a registered type-3 program both the local and
the hull role and marks the tessellation configuration mergedHull. The
local stage only passes gl_VertexIndex and gl_InstanceIndex in a 16-byte
record. The hull stage runs the whole program, one invocation per output
control point: v2 and v5 come from the record of control point
min(gl_InvocationID, inputs - 1), v3 is the relative vertex id, and the
LDS becomes a per-control-point output array that a control point writes
in its own record and reads in any record of its patch after the barrier.
Registers live across the barrier stay in the invocation.
The hull stage of a merged program runs at one lane per invocation on
every device (HostSubgroupSize 1). Its lanes are gl_InvocationID, not host
subgroup invocations, so the s_cbranch_execz around the local part tests
the invocation's own lane. With the device's subgroup it took a subgroup
ballot, and lavapipe, whose subgroup stages lack the tessellation control
stage, rejected the draw ("subgroup capability 61 is unsupported for
shader stage 2").
The lowering refuses more input than output control points, LDS writes
outside the own record, reads outside the patch's records, barriers that
some invocations do not reach or that sit in a loop, reads or writes of
another lane's register, outputs beyond the device limits, and fetch
subroutines. Type 3 is prepared with its stage group like type 5 and
takes its float mode from RSRC1_HS. The hull user-data address (SH
0x102/0x103) is optional for a merged program: s[0:1] take it, unchecked,
when the draw sets it and are zero otherwise.
Both stages refer to one binary, so a draw lists each code and header
region once (AppendProgramMemory); a request's memory regions must not
overlap. An indirect draw's record words go into every program whose user
data holds the register, so the hull stage of a merged program reads
them too.
mergedHull is part of the recompile cache key, the draw decode comparison
and the request serialization (version 36).
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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@milescoviello a heads-up for #6612: #4650 merged and took request version 35, so this PR moved again. The head is now d919e63 on The test side:
#6801 and #7410 also write 36, so after the first of the three lands, the next one takes 37. AI-assisted: yes (Claude Code) |
What
PPSA11386 (007 First Light) registers its tessellation hull programs as type 3: one binary with the local and the hull part, addressed through
SPI_SHADER_PGM_LO_LS(SH 0x148), with noSPI_SHADER_PGM_LO_HS. The local part runs on the lanes belows3[7:0]and writes LDS, ans_barrierfollows, and the hull part runs on the lanes belows3[15:8]and may store the registers the local part filled.mainskips type 3 at registration (#1893) and its draw decode asks 0x148 for a type-5 local half, so the title stops in its level load:registered program refers to an incompatible shader binary type#3444 handles a header fused at runtime that selects a registered back half; a registered type-3 binary has no back half to select.
Changes:
mergedHull. The hull user-data address (SH 0x102/0x103) is optional for it:s[0:1]take it, without the range check, when the draw sets it and are zero otherwise (the separate hull half keeps requiring and checking it). Type 3 is prepared with its stage group like type 5 and takes its float mode fromRSRC1_HS.gl_VertexIndexandgl_InstanceIndexin a 16-byte record per input control point.v2andv5come from the record of control pointmin(gl_InvocationID, inputs - 1),v3is the relative vertex id, and the LDS becomes a per-control-point output array (ControlShared): a control point writes its own record and reads any record of its patch after the barrier, with the stride taken from the code as for the local stride. Registers live across the barrier stay in the invocation.HostSubgroupSize1, as vertex programs do without vertex subgroups). Its lanes aregl_InvocationID, not host subgroup invocations, andmain's hull lowering already turns every lane-dependent value into a per-invocation one (lane id, own-lane bits) and refuses other lane masks. In the test's merged program thes_cbranch_execzaround the local part is the only wave-level operation left: with the device's subgroup it took a subgroup ballot (GroupNonUniform,GroupNonUniformBallot), which lavapipe rejects in the tessellation control stage (subgroup capability 61 is unsupported for shader stage 2). With one lane per invocation the branch tests the invocation's own lane and the module declares no subgroup capability, on lavapipe and on hardware alike.s_barrierthat some invocations do not reach or that sits in a loop; reads or writes of another lane's register (v_readlane_b32,v_writelane_b32, DPP,ds_swizzle_b32,ds_permute_b32,ds_bpermute_b32,v_permlane16_b32), which one lane per invocation does not hold; outputs beyond the device's tessellation control limits; fetch subroutines.ProgramMemory, used by the draw and byPrepareGraphicsStages); a request's memory regions must not overlap (RequestMemoryView memory regions overlapotherwise).UserDataWords). The local and hull stages both hold SH 0x10c onwards;mainwrote only the first, the local stage, which of a merged program only writes the vertex record. Separate hull halves now get the words in both halves too, as both read the same registers.mergedHullis part of the recompile cache key of the local and hull stages, the draw decode comparison and key, and the request serialization: version 36, a byte at the end of the tessellation configuration.gl_InvocationIDwhen it writes a per-control-point output (ControlOutput,ControlShared), not only when it reads its lane id: those writes are indexed by it.PrepareGraphicsStagestakes its memory fromProgramMemorytoo, so it now leaves out empty regions, as the draw already did.The
Merged hull programsentry indocs/dev/debt/shader.mdrecords where this differs from the console: the same control point of the same patch per hull lane, the register layout taken from the separate halves (not measured on hardware), the one-lane wave-mask branch (an invocation whose own lane fails skips the scalar instructions the console runs for the wave) andv_readfirstlane_b32(the invocation's own value), runtime buffer loads for the vertex fetches, and the optional user-data address.Overlap (trial merges with
git merge-treeagainst this branch and againstmain):TessellationLowering.cppandtests/execution/Tessellation.cppare feat(agc): draw tessellation followed by an NGG geometry stage #6612, feat(shader): read hull inputs at a control point chosen by a select or phi #6551 and fix(shader): accept a local tessellation index that nothing observes #6657 (below); none touchesPreparedGraphics.cpp.mainwrites version 35 (feat(agc): remap a viewport depth range the device cannot express into the vertex shader #4650'starget.depthRangeRemapand, with a vertex context,depthRemapMode, at the end of the request; fix(recompiler): run a pixel shader the guest does not iterate once per pixel #6470 took 34 before), so this change takes 36 and readsmergedHullonly from 36 on. Version 35 and older requests read as not merged. feat(agc): rasterize geometry points with their point size #6801 (rebased on feat(agc): remap a viewport depth range the device cannot express into the vertex shader #4650) and fix(shader): share wave64 VGPRs past the private ones between the two halves #7410 also write 36; each of the three that lands later takes the next number. fix(agc): keep the guest's sample order where pixel (0,0)'s locations stand in for a 2x2 grid #6683 and feat(agc): draw point lists on the vertex path with their point size #6639 still write 35, and feat(shader): emulate barycentrics and per-vertex parameters on the mesh path #6941, fix(agc): replace with a stencil operation value the pixel shader exports #6762 and perf(shader): flush f32 denormals in hardware when a startup probe matches the emulation #6503 write 33, on bases from before feat(agc): remap a viewport depth range the device cannot express into the vertex shader #4650; fix(shader): preserve raw fragment exports for integer attachments #6235 writes 30.Draw.cpp(the draw's program memory and the indirect record patch) and perf(agc): compile uncached draws ahead of queue 0 #6188 the same spot ofDrawCache.hpp; both conflict textually.HostSubgroupSize()inRecompiler.cpp, where this change adds the merged-hull line; it conflicts textually.DrawDecode.cpp,ShaderRegistry.cpp,Draw.cppandDrawCache.hpp(perf(agc): data-only draw hits compare only the user words a stage reads #5656, perf(agc): reuse cached draw stages when only buffer base addresses moved #5609, perf(agc): find cached draws across moved user-data pointers #4943, perf(agc): pipeline indirect draws behind the packet worker (APS5_PIPELINE_INDIRECT) #1896, perf(agc): the draw committer polls briefly for the next draw before it sleeps #5867, perf(agc): pipeline DMA_DATA when APS5_PIPELINE_DMA=1 #6208, perf(agc): release unused registered shader resource plans #6178, feat(agc): link calls through the AGC FS table #6160, fix(agc): defer unrouted vertex barriers #6150, fix(agc): normalize unused viewport depth ranges #6535, perf(agc): relocate cached draws across user words that only reach the shader as values #6539, fix(agc): stop and join the driver's thread pools at shutdown #6641) merge with this change as they do withmain.Driver::drawthat this change and perf(agc): cut per-draw heap allocations #6312 touch. Each turns the per-drawmemoryandprogramsinto references to a per-draw tail. Whichever lands second resolves the conflict;AppendProgramMemorythen fills the tail's vector.TessellationLowering.cpp; it merges cleanly with this change; its new test's two-argumentLowercall still compiles.TessellationLowering.cpponly on theLoweringmembers (itsDependenceenum and map besidelocalStrideandsharedStride).docs/dev/debt/shader.mdwhere this change does; placement only.Tested
main676d423. feat(agc): remap a viewport depth range the device cannot express into the vertex shader #4650 took request version 35 there, so this change writes 36 and readsmergedHullonly from 36. Git merged the read at 35 without a conflict, and the tests catch that.verifyMergedHullConfigurationfinds the flag 50 bytes from the end, because feat(agc): remap a viewport depth range the device cannot express into the vertex shader #4650's depth-remap fields follow with a vertex context. It reads version 30, 31, 32, 34 and 35 requests as not merged.main's version 35 format.writablePrograms;AppendProgramMemoryfills the vectormainreserves.request_serializer,agc_shader_memory,agc_driver_tessellation,agc_tessellation_factor_ring,agc_driver_prepared_graphics,agc_driver_prepared_graphics_prebuild_unset,agc_pipeline_journal,agc_driver_pipeline_journalandguest_requested_exitpass.ctest -R 'agc|shader|recompiler|request|tess': this change 753 of 772 pass, and so doesmain676d423 built the same way. Both fail the same 19:shader_cache_runtime_sources, plus the 18 listed below for 324e0e4. The container does not permit userfaultfd, and 15 of those 18 report guest memory that is not write-watched or needs to be.main324e0e4, the previous head (4e7fa2b, version 35): 744 of 762 pass, the same asmain324e0e4. Both fail the same 18:agc_driver_bc_block_copy,agc_driver_depth_compare_copy,agc_driver_guest_memory_lifetime_converted,agc_driver_image_srgb_sample_copy,agc_driver_image_srgb_sample_copy_forced,agc_driver_image_table_vouched_lookups,agc_driver_image_table_vouch_queued_draws,agc_driver_msaa_dcc_clear_2,agc_driver_msaa_dcc_clear_4,agc_driver_msaa_dcc_clear_8,agc_driver_native_depth_bda_clear,agc_driver_native_depth_clear_refusals,agc_driver_native_depth_clears,agc_driver_native_depth_retirement,agc_driver_native_multisample_depth,agc_driver_staged_clear_sampled_read,agc_driver_storage_write_back_overhang,agc_storage_kept_unit_settle.BUILD_TESTING=ON, lavapipe (Mesa 26.2.4, LLVM 23.1.1).ctest -R 'agc|shader|recompiler|request'onmain92e5041, with the earlier version-31 head:main: 591 of 601 pass.agc_storage_kept_unit_settle,agc_pending_key_stores,agc_driver_bc_block_copy,agc_driver_depth_compare_copy,agc_driver_native_multisample_depth,agc_driver_staged_clear_sampled_read,agc_driver_storage_write_back_overhang,agc_driver_native_depth_retirement,agc_driver_native_depth_clears,agc_driver_native_depth_clear_refusals(most need write watching, which the container does not have).agc_driver_tessellation: two merged-hull draws (MergedHullCode, andMergedHullRegisters, whose hull part stores a register its local part filled) checked like the separate-hull draws (RequirePatches); refusals for more input than output control points, an LDS write into another control point's record, an LDS read past the patch's records, a divergents_barrierand av_readlane_b32of lane 0 (which the one-lane emitter would otherwise compile); the merged hull stage compiled with the device target declares noGroupNonUniformcapability; registration and graphics ABI resolution of a type-3 stage group (twice, the second from the prepared ABI).agc_driver_prepared_graphics: the decode of a merged hull draw at ABI resolution and at draw time (roles, entry points, user SGPR layout, user-data address set, unset, zero, and set to an unmapped address that the program does not need), its program memory listed once and accepted byRequestMemoryView(and used as the stages' request memory), the user-data words of SH 0x10e in both stages, preparation as two separate stages that the draw reuses, separate halves still decoded as before and still requiring the address; a merged program's vertex tables read from its user-data slots behind the eight hidden words.agc_shader_memoryandrequest_serializer: themergedHullbyte round-trips; version 30, 31 and 32 requests (32 ismain's current format; with and without tessellation) read as not merged, keep their fields and re-serialize to the version 33 bytes; the version 33 fixtures; version 34 is rejected. With the field read from version 32 on, as in the previous head, both fail withRequestSerializer: truncated data.main1b1f848 (after feat(recompiler): run single-wave wave64 compute programs at one lane per invocation on 32-lane hosts #5405 took version 32), the same node:request_serializer,agc_shader_memory,agc_driver_tessellation,agc_tessellation_factor_ring, the fouragc_driver_prepared_graphicstests andguest_requested_exitpass (9 of 9).ctest -R 'agc|shader|recompiler|request': this change 617 of 626 pass,main1b1f848 built the same way 617 of 626; both fail the same nine (agc_driver_bc_block_copy,agc_driver_depth_compare_copy,agc_driver_native_depth_clear_refusals,agc_driver_native_depth_clears,agc_driver_native_depth_retirement,agc_driver_native_multisample_depth,agc_driver_staged_clear_sampled_read,agc_driver_storage_write_back_overhang,agc_storage_kept_unit_settle).maineb901bc with the previous head 36529f1, the same node:request_serializer,agc_shader_memory,agc_driver_tessellation,agc_tessellation_factor_ring, the fouragc_driver_prepared_graphicstests andguest_requested_exitpass (9 of 9).main92e5041, earlier head):mainwith only the tests that compile there (the type-3 registration case inagc_driver_tessellation, the serializer fixtures):agc_driver_tessellationfails withregistered program refers to an incompatible shader binary type,agc_shader_memorywithnew requests did not use serialization version 31(33 now), andrequest_serializeraborts on its version fixture. The other new cases use the new field and functions; with the change and one part reverted at a time, the check written for that part fails: the draw decode not detecting type 3 (agc_driver_prepared_graphicsandagc_driver_tessellation:registered program refers to an incompatible shader binary type); nomergedHullbyte in the serialization (a merged hull configuration was lost in serialization,request_serializeraborts); the lowering not treating the program as merged (unsupported LDS access in a tessellation stage); the hull stage at the device subgroup size (the hull stage of a merged hull program declares subgroup operations ...); no cross-lane refusal (a tessellation program was accepted although another lane's register: av_readlane_b32of lane 0 compiles silently); the program memory without the dedupe (a merged hull draw's program memory does not list each code and header region once);UserDataWordsstopping at the first program (an indirect draw's user-data register does not reach both stages of a merged hull program); the hull user-data address required (merged shader user-data address is null); the optional address range-checked (guest memory is not readable at 0x10); the read-past-patch check removed (a tessellation program was accepted although reads LDS outside its patch's control point records).MergedHullCodewithout the one-lane layout declared capabilities 61 and 64 with oneOpGroupNonUniform*instruction; with itss_cbranch_execzreplaced bys_nopit declared neither, so the branch is the only source.Draw.cppindirect record loop (onlyUserDataWordsis), the draw key'smergedHull, and the refusals for outputs beyond the device limits, a barrier in a loop and fetch subroutines.agc_driver_tessellationtakes under 1 s on the node.tools/check_conventions.py --base upstream/mainandgit diff --checkpass.maineb901bc: NVIDIA GeForce RTX 3080 (615.78.08), CachyOS (Linux 7.2.10), GCC 16.2.1, Release withBUILD_TESTING=ON,ctest -R 'agc|shader|recompiler|pm4|draw|position|tess|hull|request':agc_driver_stencil_ref_exportskips andagc_driver_store_over_untrackedfails.mainbuilt the same way: the same 625 pass, the same skip and the same failure, on the same test list.agc_driver_store_over_untrackedfails on both withthe result did not reach a block the CPU left alone; Windows: StoreOverUntracked fails at "the first result was not stored" #6347 tracks the same test failing on Windows.main4186f06 plus open PRs, unpublished local fixes the title needs, local logging and scripted input, and the title's two feedback-wait limits widened in its executable as described in 007 First Light (PPSA11386): the terrain crash after Resume is a stale read of a GPU feedback buffer past the title's own wait limits #6172 (local only). These runs used the earlier version-31 head; the version change does not touch the draw path.main-based stack without a merged-hull change stopped in the level load after present 1188 withregistered program refers to an incompatible shader binary type.mainup to 5d9dcc4, the title stops in the level load after present 1195 withmerged shader user-data address is null: a merged hull draw there leaves the hull user-data address null.Checklist
main; feat(agc): draw tessellation followed by an NGG geometry stage #6612 builds on this changeNotImplemented_nid_no_patch); silent stubs are listed under Silent stubs in their library's technical debt file.mdfiles or images added to the repository (attach them to this PR)🤖 Generated with Claude Code