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feat(agc): import uniform multisampled DCC fast clears - #5939
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Merged onto current The three-argument call at line 396 came in on Two titles stop on
I can run both on a rebased head. AI-assisted: yes |
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@milescoviello Fixed and rebased in 3851b712c: I reproduced the compiler error before that correction. The updated head passes the full Windows build and selected NVIDIA/AMD tests; Ubuntu24.04/GCC13.3 builds all four fixture executables and passes the five supported lavapipe groups once plus five repeats. The description has exact pins, hardware limits and the2x/8x software-device skips. Could you retest Rush2 and the MGS4 manual at this head? I have not independently run those titles. AI-assisted: Codex. |
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Thanks for the quick fix.
So both titles get past the check on AI-assisted: yes |
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@milescoviello Thanks for the scalar measurements. They distinguish two states that the combined refusal message did not. I checked Mesa's pinned CMASK definitions: the zero MSAA CMASK code denotes a register color clear plus FMASK clear, and is marked illegal with DCC. I am retaining the Rush 2 refusal rather than admitting that combination solely because both snapshots are uniform. This does not prove the title submitted invalid metadata; an earlier missing operation or ordering discrepancy could still produce the observed state. For MGS4, If your captured scalar state includes the complete |
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They didn't, so I captured them. This is a throwaway print at the top of
AI-assisted: yes |
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A correction and the values you asked for. In my last comment I wrote that Rush 2's accepted call and its refused call are on the same target. That's wrong. They are two different targets, with their own CMASK and DCC. Wave Race 64 Recompiled (PPSA69424, 00.001.000), new in the catalog, behaves the same: on Registers. These come from a throwaway print in
Where the zeros come from.
For the refused target all five dispatches are logged before the draw thread's import. The import still reads With a sync at the top of the import, ahead of the generation collect: if (use.cmaskAddress != 0) dccRanges.push_back({use.cmaskAddress, use.cmaskBytes, 0});
+ if (auto* recorder = Recorder::Active(); recorder != nullptr) {
+ Recorder::CountSync(1);
+ recorder->Sync();
+ }
for (auto& range : dccRanges) {all three targets import with CMASK Linux (Ubuntu 24.04, GCC 13.3, Release), RTX 4070 Ti, NVIDIA 595.99. Two runs of each title per build, same results. AI-assisted: yes |
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A follow-up on the ordering, plus an offer. The clear dispatches in Rush 2 and Wave Race 64 run the same 11-word compute kernel, and so do Ruffle's (PPSA68091) CMASK/FMASK/DCC clears. Its user data is Because the stores are address-based, the recorder notes no pending write for them, so a CPU-side read of that memory doesn't wait for them. I matched the kernel into On I haven't opened it as a PR because of that. Would you rather I open it after #5939 lands, or carry it in here? The match and its test ( Linux, RTX 4070 Ti, NVIDIA 595.99. AI-assisted: yes |
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@milescoviello The range diagnostic is now proposed upstream in #6869, explicitly depending on #5939. Its own two-file change (+30/-3) is pushed on The existing refusal prefixes and predicates remain. Details identify the color/DCC/CMASK plane, address, byte count and sample count; they do not identify the writer or implement resident writes. Fresh application/library ( The complete source tree differs from the tested/analyzed Earlier main82 and main5d validation, negative controls and full-build evidence@milescoviello Refreshed the diagnostic on clean main It keeps every existing refusal condition and adds the affected color/DCC/CMASK plane, address, byte count and sample count to reuse errors. It does not identify the writer or enable resident writes.
This prepares the focused follow-up for #5939's merge. Its combined CI failure is the independently confirmed #6792 CPU fixture, addressed by #6789. No fresh title run, writer attribution, raw console measurement or current full-app claim follows from this selected campaign. AI-assisted: Codex. Earlier diagnostic, ordering and full-build/control evidence at original pins@milescoviello The #5939/#6543/#6669 combination is independently component-tested; the central report on #6669 records its one conflict resolution and 70 passing Windows processes. Your title comparisons remain external evidence; I have not reproduced those title runs. A focused diagnostic for the remaining refusal: 99a159a16 is a 30-line addition/three-line replacement on main Validation:
Physical GPUs: RTX 5080 ( I excluded a separate repeated-clear fixture attempt: creating its private metadata GPU import loses the watched-memory prerequisite, including when done before the initial target snapshot. That arrangement does not isolate the intended metadata-transition gap and does not identify a title writer. No production guard was relaxed, and no new capability fix is claimed. The diagnostic is available on our fork for a future Rush 2/Wave Race retest; please include the full refusal if you use it. Resident writes remain unsupported. #6543 already covers the dispatch correction; no duplicate PR is needed for it. AI-assisted: Codex. |
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Thanks @Amoenus, and thanks for the credit. The dispatch part of my branch turned out to be the same change as #6543 (karanvora2599: RADV's fill-memory kernel as a buffer fill), which was already open when I found it. So I'd rather not open a second PR for it, and #6543 is the follow-up I'd point review at. I ran it with this PR on
With #6543, both titles reach the resident-write stop every time. That fits the fills being ordered before the import, as with the full sync I tried earlier. Without it, which stop you get depends on that race. On Ruffle (PPSA68091), #6543 makes the race go the other way: it then stops on AI-assisted: yes |
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Checked on Linux (GCC, merged onto current |
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@adriadam10 The previously observed Linux fixture blocker is now resolved on main. Main On plain main66, Ubuntu24.04 WSL2 / GCC13.3 / Release, the real CPU graphics target builds and This removes the specific failure seen in the earlier seven-PR Build below. A fresh maintainer-triggered combined Build for #5939 on updated main is still needed before calling the PR's full CI green. The separate main66 Build does not include #5939. This report does not replace either CI result; no upstream merge or workflow dispatch was performed. Latest plain-main CI: main93 Build38941524429 has successful Windows and Linux jobs. The Windows log reports zero failures among1321 CTest results, including Earlier main66 CI follow-up: the Linux job passes. The completed Windows job also passes Earlier combined Build38901085129, before the main66 correction@adriadam10 The combined Build38901085129 has finished. Windows passes. Linux builds the application and libraries, then fails only The failing serialized request is vertex stage, address This was a seven-PR composition on main AI-assisted: Codex; fresh CPU checks run locally. |
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Re-checked on Linux (GCC, merged onto current |
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Rebased onto current |
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What
Import uniform initial DCC fast clears (00/40/80/c0) into native 2×/4×/8× color targets. Supported targets are pipe-aligned, single-layer, level-zero SW_64KB_R_X with supported clear conversion and uniform CMASK states.
Color/DCC/CMASK ranges must remain watched and unchanged. Same-value CPU stores invalidate reuse. Metadata release invalidates reuse while retaining the resident color owner. Unsupported compression, register-clear DCC contents, layouts, transforms, lossy modes, writes and guest publication throw.
Addresses the initial-clear subset of #5336; tracking/coherence work remains in #3036. This rebase retains merged #4767 FMASK decompression and #4820 native color sampling. FMASK decode now carries DCC control to the importer rather than hiding unsupported flags.
Geometry follows pinned AMD Addrlib and pinned PS5 Mesa configuration. Clear conversion reuses DccMetadata/TextureFormat. This is source-backed geometry, not a PS5 console measurement.
Tested
Head 3851b712c, base main
1db84d5748573165ccb241618bf5e1ccd91095c4. One topic commit; the prior published347d and earlier checkpoints are preserved. The rebase corrects the newly addedcreateFilledcall to passcreated.metadataValid, as the existingacquirecall does.agc_multisample_guest_accessandagc_metadata_passignore the AMD request and select NVIDIA; those two groups are NVIDIA-only evidence. CPU groups are not GPU coverage.guardargument-count error with the recorded Windows compiler command; the same command passes afterward. This is a PR compatibility correction, not a main-branch defect.Historical main8f51 test-only red controls and the225-case x5 PAL geometry/configuration controls retain their original pins; they were not rerun on this base. The current runs above exercise the unchanged numeric/refusal tests. The later main
a08de6827f217115078660b9f47201edae59668bmerge check is clean; that merged composition is untested. Each selected CTest has a30s bound. Full upstream CI requires maintainer dispatch.Sonic Unleashed Recompiled PPSA99902, 01.003.000 stops during descriptor decoding on main:
The fresh original-input replay of earlier tested capability8d375dd9d advances past that stop and reaches
initial multisampled DCC contents require watched guest memoryafter29.343s (0xC0000409,no timeout). Exact126-module profile, loader5/5; originals/runtime/guest libc/user data restored and hash-verified, cleanup errors empty. No retained integration/dependent depth patches. This is not a title replay of3851b712c, proof of the game's clear codes, gameplay or FPS evidence. Bring-up#4443 retains the separate integration frontier.Independent Linux title checks
milescoviello's latest comparison uses main
5d9dcc42d, Linux/RTX 4070 Ti/NVIDIA 595.99, scripted pad input and two runs per title/build with a 60-second limit. With this head3851b712c, Rush 2 (PPSA69423) reaches the CMASK/register-clear refusal once and the resident-write refusal once; Wave Race 64 (PPSA69424) reaches the CMASK refusal twice. Adding existing #6543 at2fc4fe5e0makes both titles reach the resident-target/metadata-write refusal 2/2. Adding #6669 as well produces the same stop. These are external runs, not local title validation.The dispatch/write-tracking correction offered earlier is already #6543; no duplicate follow-up is needed. #6669 handles the other CMASK state exposed in Ruffle (PPSA68091), as the reviewer reports there. The #6669 overlap is now resolved and independently component-tested in composition 13ed9df on main
5d9dcc42d(+ #6452 for Windows tests), retaining both this PR's DCC exclusion/metadata guard and #6669's raw CMASK reader. Full Windows build/checks and 70 component processes pass; selected Linux tests and an additional classifier test also pass. The central report records exact pins, test counts, GPU identities and limitations. These component results do not reproduce the external title runs. This PR's production dependency remains unchanged; these are related follow-ups and workload interactions.The reviewer also corrected the earlier same-target claim: the accepted/refused imports concerned different targets. The queued-fill observations do not establish invalid title metadata or justify admitting zero CMASK. The earlier MGS4 launcher-manual result still ends at the CMASK/register-clear refusal; no revised MGS4 result is available. Initial uniform clears remain this PR's scope; resident-target writes and successful gameplay remain unimplemented/unverified respectively.
Separate resident-range diagnostic proposal: fork 99a159a16, based on main5d + this PR, preserves the refusals and identifies the affected color/DCC/CMASK range and sample count. Maintained validation report: full Windows build, both physical GPUs, pre-diagnostic control/restoration and selected Linux tests. This is a fork proposal, not a change to this PR's published head or a repeated-clear implementation. No new title run or first-writer attribution.
Checklist
main(standalone tested1db; main5d combination tested separately above); no other open PR implements the same functions