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perf(shader): reuse packed f16 operand lanes - #5811
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adriadam10 merged 1 commit intoOct 14, 2026
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What
packedFloat16emits the packed f16 operand selection and lane extraction once to form a native f16x2 add/multiply. When it emits the exact NaN/overflow repair path, it recomputes the same selected low/high halves for those operands. Cache each half lazily during the translation and reuse it for the result and repair logic. This avoids duplicate IR for extraction,OP_SEL, absolute value, and negate handling. The instruction result and existing repair rules are unchanged.This is the smaller follow-up suggested in the review of closed #5057 after the guarded repair path showed no Palworld gain and grew the SPIR-V module. It makes no title-level performance claim. It depends on #4072, which changes the same packed-f16 translation function.
Tested
git diff --checkpassed.Checklist
main; no other open PR implements this reuseNotImplemented_nid_no_patch); silent stubs are listed under Silent stubs in their library's technical debt file.mdfiles or images added to the repository (attach them to this PR)