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feat(shader): implement s_sethalt, s_sendmsghalt and s_code_end - #1068

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Kikoarl:feat/shader-sopp-control-flow
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boykopovar:mainfrom
Kikoarl:feat/shader-sopp-control-flow

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@Kikoarl

@Kikoarl Kikoarl commented Oct 7, 2026

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What

Identified from the AMD RDNA 1 + RDNA 2 instruction specification (tools/rdna_isa.txt) to complete 100% of the SOPP instruction family (37/37):

  • s_sethalt (SOPP opcode 0x0d): sets or clears the wavefront HALT status bits for debugging; translated as a control NOP in emulation.
  • s_sendmsghalt (SOPP opcode 0x11): sends a message to the message processor and halts wavefront execution; translated via sSendmsg.
  • s_code_end (SOPP opcode 0x1f): safety prefetch padding emitted after shader termination (s_endpgm) to prevent prefetch hardware from fetching unmapped pages; translated as a control NOP.

TechnicalDebt.md updated under Functional in the same commit.

Tested

  • Linux x86_64: agc_sopp_control_decode unit test passed (verifies decoding of each opcode, operand values, instruction family, and whole-program sequences).

Checklist

  • Based on current main; no other open PR implements the same functions
  • One topic per PR; follow-ups go in a new PR
  • No comments in code except technical debt
  • Unimplemented paths throw (NotImplemented_nid_no_patch); silent stubs are listed in TechnicalDebt
  • No notes, investigation .md files or images added to the repository (attach them to this PR)
  • New third-party code is a submodule built from source
  • Generic behaviour, not specific to one title
  • Depends on: none
  • AI-assisted: yes

Decode the remaining three SOPP opcodes from the AMD RDNA 2 ISA to achieve 100% SOPP instruction coverage (37/37):
- s_sethalt (SOPP 0x0d): sets or clears the wavefront HALT status bits; translated as a control NOP.
- s_sendmsghalt (SOPP 0x11): sends a message to the message processor and halts execution; translated via sSendmsg.
- s_code_end (SOPP 0x1f): safety prefetch padding placed after shader termination; translated as a control NOP.
@github-actions

github-actions Bot commented Oct 7, 2026

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Progress report (2a12b68 → 42fbe3e)

📈 GPU shader instructions: 97.68% (+0.25%, +3 implemented instructions)

✅ 3 implemented
Encoding Name
SOPP S_CODE_END
SOPP S_SENDMSGHALT
SOPP S_SETHALT

@adriadam10

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Closing this one. Checked on gfx1035 hardware (HW oracle) and against the decoder:

  • s_code_end is not a no-op when executed: placed between two VALU ops it never lets the kernel finish (timeout), while s_nop 0 and s_sethalt 0 in the same spot run through. Real programs only have it as padding after the final s_endpgm, and RdnaInstructionDecoder already stops there (RdnaInstructionDecoder.cpp:171), so the only case this PR makes decodable is the one where emitting a NOP is wrong (it is the sequence in SoppControlDecode.cpp:57-62).
  • s_sethalt with SIMM16[0] = 1 halts the wave and s_sendmsghalt sends the message and then halts. Translating them as a NOP (ScalarInstructions.cpp:408) and as a plain s_sendmsg (ScalarInstructions.cpp:428) keeps executing past the halt, a plausible-but-wrong result where main throws (CONTRIBUTING: silent no-ops only for UI behaviour). s_sendmsghalt is also missing from the TechnicalDebt line.
  • The test only checks decoding (opcode, family, operand); nothing exercises the translation, so it can't catch any of the above.

What remains correct is s_sethalt 0 as a no-op, which no title we've looked at uses. Feel free to reopen if you have a shader that hits one of these: s_sethalt 0 as a no-op, any other value throwing, s_sendmsghalt left undecoded, plus a test that runs the translation.

@adriadam10 adriadam10 closed this Oct 7, 2026
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