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Astro Bot (PPSA21564 v01.007.000) on Linux/NVIDIA: stops after #1836/#1837/#1789, wave64 lane-63 read is NVIDIA-only #2340
Description
Title: Astro Bot (PPSA21564 v01.007.000, retail, owned). Converted from the dump's eboot.bin with relinker --registry, no --to-intel.
Host: Linux (Omarchy, kernel 7.2.5), GCC 16.2.1, RTX 3090, NVIDIA 610.57.04 (subgroup 32), selected with ANYPS5_GPU=3090; a Raphael iGPU (RADV, subgroup 64) is also present and was used for one comparison. DualSense connected.
Builds: main f145139; and main f145139 + #1836 + #1837 + the #1789 candidate CouchRiv:fix-shader-sampled-heap-capacity bd5f22c (no PR for #1789 at the time). Full build with -DBUILD_TESTING=ON -DANYPS5_ENABLE_SPIRV_TOOLS=ON; ctest 498/498 on the stack.
Launch: ANYPS5_GPU=3090 timeout 300 ./app.elf, one launch at a time, cold shader cache then warm.
Report in the shape #1671 asks for: every stop in order with the exact text, what was reached, what was not. Evidence level not_tested: no frame is presented on any build (no swapchain, no window; VulkanDevice constructor window=(nil) throughout). The title boots to its ASOBI PlayRoom banner, reads /app0/args.txt, starts 10 threads, sets up save-data memory, opens the pad, creates the Vulkan device, then registers shaders for minutes (hundreds of sceAgcCreateShader, each prepared up front since #639).
Stop A — main f145139, ~10 s, at registration
terminate called after throwing an instance of 'std::invalid_argument'
what(): computed/data-dependent s_swappc_b64 call target at program counter 0x00000074 is not statically resolvable
Same text and PC as #1817 (Yōtei, Astro Bot v01.019 on RADV, #2062 on Windows). 54 shaders compiled before it.
Stop B — stack, third run (warm cache), ~160 s — NVIDIA-specific
terminate called after throwing an instance of 'std::runtime_error'
what(): ShaderRecompiler::Recompile: SPIR-V emission failed: hash=0x21476784128 stage=2 opcode=ReadLane reason=v_readlane_b32 of lane 63 is outside the 32-lane host subgroup that runs this wave64 program at one lane per invocation
A wave64 tessellation-control program reads lane 63; on a 32-lane host the non-compute stages run one guest lane per invocation, so #997 throws. It is raised from ResolveGraphicsStagesAbi (shader ABI resolution during registration), so #1836 does not defer it and the run ends. It comes before any draw or dispatch: with APS5_TRACE_DISPATCH_IO=1, no [dispatch-io] line is printed in any run. The same stack on this machine's RADV iGPU (wave64 subgroups) compiles all 839 registered programs without it, so the NVIDIA-only nature is measured. No open PR addresses it; #997 calls cross-subgroup lane reads a design question. The serialized RecompileRequest is in the log (available on request).
Stop C — behind B, seen on the iGPU, ~110 s warm
ShaderRecompiler::Recompile: SPIR-V validation before optimization failed:
level=2 word=11079: The continue construct with the continue target '95[%95]' is not structurally post dominated by the back-edge block '8296[%8296]'
#1921's message on a graphics program at ABI resolution. #1964 applied on top does not change it (same program, same words), so this instance has another cause than #1921's image-mode switch. Device-independent; it will be the next stop on NVIDIA once B is out of the way. By then the title prints its own Material [...] is Replaced. lines, so startup is progressing.
Deferred by #1836 on the stack (not stops)
| Reason | per run |
|---|---|
computed/data-dependent s_swappc_b64 call target at program counter 0x… is not statically resolvable (#1817) |
52 / 96 / 96, at 27 distinct PCs (0x40 … 0x204) |
its program address is not in the shader registers (type 4 headers) |
0 / 0 / 23 |
SPIR-V validation before optimization failed: … continue target '44[%44]' … back-edge block '2492[%2492]' (#1921, compute, deferred) |
0 / 0 / 1 |
The user-data s_swappc_b64 programs are a family of SDK compute shaders (vertex pulling for culling). Disassembling the deferred ones shows what #1817's sketch leaves out: each makes four calls through one link pair s[14:15] (s_mov_b32 s14, s4; s_mov_b32 s15, s5; … s_swappc_b64 s[14:15], s[14:15], then the same through s[8:9] three times), copies the pointer out of s[0:1]/s[2:3] and then reuses those registers with s_load_dword, saves the pair with s_mov_b64 s[84:85], s[14:15] before the first call, and runs s_cmp/s_cbranch/trap guards between the copy and the call. Any implementation of #1817 (#2302) needs these shapes; I will post the title result against #2302 there.
Not reached / untested
Gameplay, audio, input beyond pad open, save/resume, performance, Windows. Both #1837 and the #1789 candidate were needed to get past rectangle ABI refers to a replaced shader header and shader image heap capacity exceeded after #1836, as the RADV reporters found.
Logs for every run are kept locally; say if you want a specific one attached. Written with AI assistance (Claude Code) on the owner's machine; the owner reviewed it.
Activity
oneandonlydean commentedon Oct 10, 2026
Stop B (
hash=0x21476784128 stage=2, lane 63 read in the tessellation-control program) is the case #2449 handles: the key select's mask comes through a divergent branch, and the half-wave proof now follows it. Stop A is waiting on #1836.oneandonlydean commentedon Oct 10, 2026
#1836 and #2449-#2451 are merged, which cover stops A and B. Could you retest on current main?
snoozedDev commentedon Oct 10, 2026
Retested on
main99b9841 (same host: RTX 3090, NVIDIA 610.57.04, GCC 16.2.1, Release with SPIRV-Tools),ANYPS5_GPU=3090 timeout 300, cold cache then warm.mainaloneits s_swappc_b64 at program counter 0x… calls a computed target). Stop A is gone as a stop.AGC driver: rectangle ABI refers to a replaced shader header. That is fix(agc): accept bound copies of a registered shader header that differ only in user_data #1837, still open.main+ #1837 + a local sampled-heap bump (SampledHeapCapacityraised to the metadata limit with the bindless table kept at 16, since #1789 is still open and the earlier candidate branch no longer applies after #2282):Material [...] is Replaced.output. Deferred by fix(agc): defer shaders that cannot be prepared at registration to their first use #1836: 96s_swappc_b64computed-target programs, 31its program address is not in the shader registers, 1 structurizer validation failure.ReadLaneerror. fix(shader): prove half-wave reduction keys through selected and merged lane bits #2449–fix(shader): read lane 63 of a wave64 v_max_f32/v_min_f32 half-wave scan #2451 confirmed on NVIDIA.APS5_TRACE_DISPATCH_IO=1prints nothing) and no frame. fix(videoout): create the window and the device when VideoOut starts #1367 now creates the window and a 2304×1296 swapchain at start, but no window is mapped by the compositor within 300 s, so there is nothing to screenshot yet. The title is still in shader registration; each warm run gets further.Next stops on NVIDIA, in order, are therefore #1837 and #1789, then whatever follows registration. Logs kept; say which one you want. AI-assisted: yes; reviewed by me.
oneandonlydean commentedon Oct 10, 2026
Closing: your run shows stops A and B gone, and #1837 and #2347 (sampled heap of 64) have merged since. Please open a new issue for the next stop on current main.