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fix(linker): correct cross-toolchain memory map inconsistencies #11

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5781f92
fix(linker): correct cross-toolchain memory map inconsistencies on NU…
94xhn Jul 11, 2026
9f71975
Preserve both SRAM banks in the U031 MDK project
94xhn Jul 28, 2026
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2 changes: 1 addition & 1 deletion Projects/NUCLEO-U031R8/Examples/FLASH/FLASH_FastProgram/MDK-ARM/FLASH_FastProgram.uvprojx
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Original file line number Diff line number Diff line change
Expand Up @@ -302,7 +302,7 @@
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20002000</StartAddress>
<Size>0x4000</Size>
<Size>0x1000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
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9 changes: 5 additions & 4 deletions Projects/NUCLEO-U031R8/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32U031R8TX_FLASH.ld
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Expand Up @@ -6,8 +6,9 @@
** @author : Auto-generated by STM32CubeIDE
**
** @brief : Linker script for STM32U031R8Tx Device from STM32U0 series
** 64KBytes FLASH
** 8KBytes RAM
** All the executable code is mapped in SRAM1 area
** (see readme.txt: this example runs entirely from RAM)
** 8Kbytes of SRAM1 used for code, 4Kbytes for data
**
** Set heap size, stack size and stack location according
** to application requirements.
Expand Down Expand Up @@ -44,8 +45,8 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K
RAM (xrw) : ORIGIN = 0x20002000, LENGTH = 4K
FLASH (rx) : ORIGIN = 0x20000000, LENGTH = 8K
}

/* Sections */
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16 changes: 8 additions & 8 deletions Projects/NUCLEO-U031R8/Examples/PWR/PWR_ModesSelection/MDK-ARM/PWR_ModesSelection.uvprojx
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Original file line number Diff line number Diff line change
Expand Up @@ -18,10 +18,10 @@
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32U0xx_DFP.0.1.0</PackID>
<PackURL>https://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x8000) IRAM2(0x20002000,0x2000) IROM(0x08000000,0x040000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE</Cpu>
<Cpu>IRAM(0x20000000,0x2000) IRAM2(0x20002000,0x1000) IROM(0x08000000,0x010000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC2000 -FN1 -FF0STM32U0xx_256k -FS08000000 -FL040000 -FP0($$Device:STM32U031R8Tx$CMSIS\Flash\STM32U0xx_256k.FLM))</FlashDriverDll>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC2000 -FN1 -FF0STM32U0xx_64k -FS08000000 -FL010000 -FP0($$Device:STM32U031R8Tx$CMSIS\Flash\STM32U0xx_64k.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
Expand Down Expand Up @@ -247,12 +247,12 @@
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x8000</Size>
<Size>0x2000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x40000</Size>
<Size>0x10000</Size>
</IROM>
<XRAM>
<Type>0</Type>
Expand All @@ -277,7 +277,7 @@
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x40000</Size>
<Size>0x10000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
Expand All @@ -302,12 +302,12 @@
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x8000</Size>
<Size>0x2000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
<StartAddress>0x20002000</StartAddress>
<Size>0x1000</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
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