[CUB] GPU-to-GPU DeviceReduce with device resident problem size#9740
[CUB] GPU-to-GPU DeviceReduce with device resident problem size#9740NaderAlAwar wants to merge 28 commits into
DeviceReduce with device resident problem size#9740Conversation
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📝 WalkthroughSummary by CodeRabbit
WalkthroughAdds deferred num_items support to GPU-to-GPU deterministic reduce by wiring device-resident problem sizes through DeviceReduce, dispatch, kernels, tests, and benchmarks. ChangesDeferred deterministic reduce support
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cub/benchmarks/bench/reduce/deferred_deterministic.cucub/benchmarks/bench/reduce/deterministic.cucub/cub/device/device_reduce.cuhcub/cub/device/dispatch/dispatch_reduce_deterministic.cuhcub/cub/device/dispatch/kernels/kernel_reduce_deterministic.cuhcub/test/catch2_test_device_reduce_deferred.cucub/test/catch2_test_device_reduce_env.cu
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Description
closes #9730
merge first #9722
This extends device resident problem size to GPU-to-GPU determinism.
No SASS changes to any existing benchmarks.
We expect the device-resident problem size to be slightly slower: the host cannot read the problem size, so it must assume it is large, launching a worst-case grid and always taking the two-pass path (there is no single-tile shortcut for small problems). The kernels read the problem size on device and trim the worst-case grid to the size the host would have computed: surplus blocks exit early, and the second pass derives the same block count to consume exactly the partials that were produced. Because the RFA accumulator is partition-independent, results are bitwise identical to the host-provided num_items path (this is verified by the tests, including problem sizes above INT32_MAX, where the two paths chunk the input differently). Compared to the host-provided num_items, the results show an overhead of at most ~7 us, which is most noticeable at the smallest problem sizes, and low single-digit percentages elsewhere.
When the problem-size element is anything other than a signed 32-bit integer we observe larger overheads at mid-to-large sizes (an unsigned 32-bit element cannot guarantee the problem fits a single chunk, so it is widened and takes the same path as 64-bit elements). Unlike the host-provided path, which chunks the input on the host so the kernel only ever uses 32-bit index arithmetic, the deferred kernel performs the equivalent chunking on device. The hot loop remains 32-bit, but carrying the wide problem size across the loop widens the kernel's register footprint relative to the signed-32-bit instantiation (F32: 40 vs. 32 registers, F64: 44 vs. 40 on SM90), which reduces occupancy. Profiling with Nsight Compute confirms this is the cause: achieved occupancy drops from 76% to 56% at F32/2^24, where the kernel is latency-bound, and the effect fades as bandwidth saturates at larger sizes. Users whose problem sizes fit in 31 bits should prefer a signed 32-bit element for the deferred source; a future improvement could use cuda::args::bounds to statically select the fast kernel from a bounded wider source.
GPU-to-GPU reduce
Checklist