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[CUB] DeviceReduce with device resident problem size
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NaderAlAwar
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NaderAlAwar:device-reduce-deferred-num-items
Jul 9, 2026
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736d434
Initial deferred num items implementation
NaderAlAwar 3596659
Add tests and benchmarks
NaderAlAwar ecd0399
Make benchmarks consistent and update tests
NaderAlAwar 2decb22
Fix sass differences
NaderAlAwar 9a963e9
pre-commit
NaderAlAwar af8fedc
Merge branch 'main' into device-reduce-deferred-num-items
NaderAlAwar 663ec1b
Address comments
NaderAlAwar b3b6097
Fix CI error
NaderAlAwar af33be0
Fix CI
NaderAlAwar 5c2ef8d
Merge branch 'main' into device-reduce-deferred-num-items
NaderAlAwar 0be8893
MSVC fix
NaderAlAwar 057a85b
Address comments
NaderAlAwar 123c142
Merge branch 'main' into device-reduce-deferred-num-items
NaderAlAwar f824032
address reviews
NaderAlAwar 4b19824
fix CI
NaderAlAwar cd93de7
address reviews
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address review
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,98 @@ | ||
| // SPDX-FileCopyrightText: Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved. | ||
| // SPDX-License-Identifier: BSD-3-Clause | ||
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| #include <cub/device/device_reduce.cuh> | ||
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| #include <thrust/detail/raw_pointer_cast.h> | ||
| #include <thrust/device_vector.h> | ||
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| #include <cuda/argument> | ||
| #include <cuda/execution.determinism.h> | ||
| #include <cuda/execution.require.h> | ||
| #include <cuda/std/functional> | ||
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| #include <cstddef> | ||
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| #include <nvbench_helper.cuh> | ||
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| #include <nvbench/range.cuh> | ||
| #include <nvbench/types.cuh> | ||
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| // %RANGE% TUNE_ITEMS_PER_THREAD ipt 3:24:1 | ||
| // %RANGE% TUNE_THREADS_PER_BLOCK tpb 128:1024:32 | ||
| // %RANGE% TUNE_ITEMS_PER_VEC_LOAD_POW2 ipv 1:2:1 | ||
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| #if !TUNE_BASE | ||
| template <typename AccumT> | ||
| struct policy_selector | ||
| { | ||
| [[nodiscard]] _CCCL_HOST_DEVICE constexpr auto operator()(cuda::compute_capability) const -> cub::ReducePolicy | ||
| { | ||
| const auto [items, threads] = | ||
| cub::detail::scale_mem_bound(TUNE_THREADS_PER_BLOCK, TUNE_ITEMS_PER_THREAD, int{sizeof(AccumT)}); | ||
| const auto policy = cub::ReducePassPolicy{ | ||
| threads, | ||
| items, | ||
| 1 << TUNE_ITEMS_PER_VEC_LOAD_POW2, | ||
| cub::BLOCK_REDUCE_WARP_REDUCTIONS_NONDETERMINISTIC, | ||
| cub::LOAD_DEFAULT}; | ||
| return {policy, {}}; | ||
| } | ||
| }; | ||
| #endif // !TUNE_BASE | ||
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| template <typename T, typename OffsetT> | ||
| void nondeterministic_sum(nvbench::state& state, nvbench::type_list<T, OffsetT>) | ||
| { | ||
| using op_t = cuda::std::plus<>; | ||
| using init_value_t = T; | ||
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| // Retrieve axis parameters | ||
| const auto elements = static_cast<std::size_t>(state.get_int64("Elements{io}")); | ||
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| thrust::device_vector<T> in = generate(elements); | ||
| thrust::device_vector<T> out(1, thrust::no_init); | ||
| thrust::device_vector<OffsetT> device_num_items(1, static_cast<OffsetT>(elements)); | ||
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| auto d_in = thrust::raw_pointer_cast(in.data()); | ||
| auto d_out = thrust::raw_pointer_cast(out.data()); | ||
| auto d_num_items = thrust::raw_pointer_cast(device_num_items.data()); | ||
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| // Enable throughput calculations and add "Size" column to results. | ||
| state.add_element_count(elements); | ||
| state.add_global_memory_reads<T>(elements, "Size"); | ||
| state.add_global_memory_writes<T>(1); | ||
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| caching_allocator_t alloc; | ||
| state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch, [&](nvbench::launch& launch) { | ||
| auto env = cub_bench_env( | ||
| alloc, | ||
| launch, | ||
| cuda::execution::require(cuda::execution::determinism::not_guaranteed) | ||
| #if !TUNE_BASE | ||
| , | ||
| cuda::execution::tune(policy_selector<cuda::std::__accumulator_t<op_t, T, init_value_t>>{}) | ||
| #endif // !TUNE_BASE | ||
| ); | ||
| _CCCL_TRY_CUDA_API( | ||
| cub::DeviceReduce::Reduce, | ||
| "Reduce failed", | ||
| d_in, | ||
| d_out, | ||
| cuda::args::deferred{d_num_items}, | ||
| op_t{}, | ||
| init_value_t{}, | ||
| env); | ||
| }); | ||
| } | ||
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| #ifdef TUNE_T | ||
| using value_types = nvbench::type_list<TUNE_T>; | ||
| #else | ||
| using value_types = nvbench::type_list<int32_t, int64_t, float, double>; | ||
| #endif | ||
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| NVBENCH_BENCH_TYPES(nondeterministic_sum, NVBENCH_TYPE_AXES(value_types, offset_types)) | ||
| .set_name("base") | ||
| .set_type_axes_names({"T{ct}", "OffsetT{ct}"}) | ||
| .add_int64_power_of_two_axis("Elements{io}", nvbench::range(16, 28, 4)); |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,86 @@ | ||
| // SPDX-FileCopyrightText: Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. | ||
| // SPDX-License-Identifier: BSD-3-Clause | ||
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| #include <cub/device/device_reduce.cuh> | ||
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| #include <thrust/detail/raw_pointer_cast.h> | ||
| #include <thrust/device_vector.h> | ||
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| #include <cuda/argument> | ||
| #include <cuda/std/functional> | ||
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| #include <nvbench_helper.cuh> | ||
|
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| #include <nvbench/range.cuh> | ||
| #include <nvbench/types.cuh> | ||
|
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| // %RANGE% TUNE_ITEMS_PER_THREAD ipt 7:24:1 | ||
| // %RANGE% TUNE_THREADS_PER_BLOCK tpb 128:1024:32 | ||
| // %RANGE% TUNE_ITEMS_PER_VEC_LOAD_POW2 ipv 1:2:1 | ||
|
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| #if !TUNE_BASE | ||
| template <typename AccumT> | ||
| struct policy_selector | ||
| { | ||
| [[nodiscard]] _CCCL_HOST_DEVICE constexpr auto operator()(cuda::compute_capability) const -> cub::ReducePolicy | ||
| { | ||
| const auto [items, threads] = | ||
| cub::detail::scale_mem_bound(TUNE_THREADS_PER_BLOCK, TUNE_ITEMS_PER_THREAD, int{sizeof(AccumT)}); | ||
| const auto policy = cub::ReducePassPolicy{ | ||
| threads, items, 1 << TUNE_ITEMS_PER_VEC_LOAD_POW2, cub::BLOCK_REDUCE_WARP_REDUCTIONS, cub::LOAD_DEFAULT}; | ||
| return {policy, policy}; | ||
| } | ||
| }; | ||
| #endif // !TUNE_BASE | ||
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| using op_t = cuda::std::plus<>; | ||
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| template <typename T, typename OffsetT> | ||
| void reduce(nvbench::state& state, nvbench::type_list<T, OffsetT>) | ||
| { | ||
| using init_value_t = T; | ||
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| // Retrieve axis parameters | ||
| const auto elements = state.get_int64("Elements{io}"); | ||
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| thrust::device_vector<T> in = generate(elements); | ||
| thrust::device_vector<T> out(1, thrust::default_init); | ||
| thrust::device_vector<OffsetT> device_num_items(1, static_cast<OffsetT>(elements)); | ||
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| auto d_in = thrust::raw_pointer_cast(in.data()); | ||
| auto d_out = thrust::raw_pointer_cast(out.data()); | ||
| auto d_num_items = thrust::raw_pointer_cast(device_num_items.data()); | ||
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| // Enable throughput calculations and add "Size" column to results. | ||
| state.add_element_count(elements); | ||
| state.add_global_memory_reads<T>(elements, "Size"); | ||
| state.add_global_memory_writes<T>(1); | ||
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| caching_allocator_t alloc; | ||
| state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch, [&](nvbench::launch& launch) { | ||
| auto env = cub_bench_env( | ||
| alloc, | ||
| launch | ||
| #if !TUNE_BASE | ||
| , | ||
| cuda::execution::tune(policy_selector<cuda::std::__accumulator_t<op_t, T, init_value_t>>{}) | ||
| #endif // !TUNE_BASE | ||
| ); | ||
| _CCCL_TRY_CUDA_API( | ||
| cub::DeviceReduce::Reduce, | ||
| "Reduce failed", | ||
| d_in, | ||
| d_out, | ||
| cuda::args::deferred{d_num_items}, | ||
| op_t{}, | ||
| init_value_t{}, | ||
| env); | ||
| }); | ||
| } | ||
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| using value_types = all_types; | ||
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| NVBENCH_BENCH_TYPES(reduce, NVBENCH_TYPE_AXES(value_types, offset_types)) | ||
| .set_name("base") | ||
| .set_type_axes_names({"T{ct}", "OffsetT{ct}"}) | ||
| .add_int64_power_of_two_axis("Elements{io}", nvbench::range(16, 28, 4)); | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,63 @@ | ||
| // SPDX-FileCopyrightText: Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
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| #pragma once | ||
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| #include <cub/config.cuh> | ||
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| #if defined(_CCCL_IMPLICIT_SYSTEM_HEADER_GCC) | ||
| # pragma GCC system_header | ||
| #elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_CLANG) | ||
| # pragma clang system_header | ||
| #elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_MSVC) | ||
| # pragma system_header | ||
| #endif // no system header | ||
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| #include <cuda/argument> | ||
|
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| #include <cuda/std/__type_traits/is_same.h> | ||
| #include <cuda/std/__utility/declval.h> | ||
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| CUB_NAMESPACE_BEGIN | ||
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| namespace detail | ||
| { | ||
| #if !_CCCL_COMPILER(NVRTC) | ||
| //! Normalizes a single-value argument without reading a deferred source. | ||
|
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| //! Immediate values are converted to TargetT. Deferred arguments are unwrapped to their source, erasing bounds from | ||
| //! the kernel type and payload. | ||
| template <typename TargetT, typename ParameterT> | ||
| [[nodiscard]] CUB_RUNTIME_FUNCTION _CCCL_FORCEINLINE constexpr auto normalize_parameter(ParameterT parameter) noexcept | ||
|
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|
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| { | ||
| using args_traits_t = ::cuda::args::__traits<ParameterT>; | ||
| static_assert(args_traits_t::is_single_value, "parameter must contain a single value"); | ||
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| if constexpr (args_traits_t::is_deferred) | ||
| { | ||
| return ::cuda::args::__unwrap(parameter); | ||
| } | ||
| else | ||
| { | ||
| return static_cast<TargetT>(::cuda::args::__unwrap(parameter)); | ||
| } | ||
| } | ||
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| template <typename TargetT, typename ParameterT> | ||
| using normalized_parameter_t = decltype(normalize_parameter<TargetT>(::cuda::std::declval<ParameterT>())); | ||
| #endif // !_CCCL_COMPILER(NVRTC) | ||
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| //! Resolves a normalized parameter to TargetT, reading element zero when the parameter is a deferred source. | ||
| template <typename TargetT, typename ParameterT> | ||
| [[nodiscard]] _CCCL_DEVICE _CCCL_FORCEINLINE TargetT resolve_parameter(ParameterT parameter) noexcept | ||
|
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| { | ||
| if constexpr (::cuda::std::is_same_v<ParameterT, TargetT>) | ||
| { | ||
| return parameter; | ||
| } | ||
| else | ||
| { | ||
| return static_cast<TargetT>(parameter[0]); | ||
| } | ||
| } | ||
| } // namespace detail | ||
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| CUB_NAMESPACE_END | ||
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